Video display device

Details Video display device Video display device

2006-01-10

2006-01-10

Chow, Dennis-Doon (Department: 2675)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C345S099000

Reexamination Certificate

active

06985129

ABSTRACT:
On a substrate (10), one or more inverter circuits for adjusting delay time are provided between an external clock input section (T1, T2) to which a clock signal CKH1or CKH2is externally input and a sampling signal generating circuit (shift register). Of the inverter circuits, only necessary inverter circuits are selected and connected, thereby delaying the sampling timing for a video signal. The connection between the inverter circuit and the signal path is achieved simply by changing a connection line pattern mask in accordance with the number of inverter circuits to be connected, and without changing other manufacturing processes.

REFERENCES:
patent: 6300813 (2001-10-01), Matsui
patent: 6462726 (2002-10-01), Hamada et al.
patent: 6476789 (2002-11-01), Sakaguchi et al.
patent: 2001/0022573 (2001-09-01), Sasaki et al.
patent: 406018617 (1994-01-01), None

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