Video display co-processor for use in a video game

Amusement devices: games – Problem eliciting response – Questions and answers

Patent

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Details

273DIG28, 340725, 340720, A63F 922, G09G 500

Patent

active

050168762

ABSTRACT:
Disclosed is a bit mapped raster display video game that includes a Direct Memory Access ("DMA") co-processor especially adapted for providing real-time animation of the image data. The DMA co-processor is adapted for combining multiple overlapping planes of image data occupying an addressable image area greater than that displayable on a video display during the time interval of a single video raster scan. As the image data is being combined, the DMA co-processor can also manipulate it to produce real-time animation. The DMA co-processor includes a Source Address Generation ("SAG") functional unit that generates the addresses of locations in an image memory from which image data is to be retrieved. Retrieved image data is manipulated within a Data Pipe ("DP") functional unit to provide images that move smoothly across the screen. Manipulated image data is stored into a bit map memory at address locations specified by a Destination Address Generation ("DAG") functional unit. A Control Section ("CS") functional unit receives image processing commands from a supervisory ditigal computer included in the video game to control the operation of the SAG, DP and DAG functional units.

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