Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal
Reexamination Certificate
2000-11-03
2004-06-15
Kelley, Chris (Department: 2613)
Pulse or digital communications
Bandwidth reduction or expansion
Television or motion video signal
C375S240000, C375S240010, C375S240120, C375S240160
Reexamination Certificate
active
06751257
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a video decompressing system and, more particularly, to a video decompressing system with efficiency memory access capability.
2. Description of Related Art
With the progress of the digital electronic technique, the use of the digitized video data has greatly increased the convenience in enjoying a video article. However, the size of the digitized video data is always so tremendous, and thus, the data must be compressed to reduce its size for transmission or storage. For those skilled in the art, there are several well-known practical video compressing standards, for example, the JPEG, MPEG1, MPEG2, MPEG4 and H.26X.
It is known that a similarity is generally existed between the front and end portions of the video data, so that there is a redundancy in the video data. Therefore, some of the compressing standards utilize an algorithm to remove such a time redundancy, so as to compress the video data. For example, the MPEG system utilizes the motion compensation technique to achieve the purpose of compressing data. With reference to
FIG. 6
, there is shown a motion compensation process in the time domain for a MPEG system. As well known to those skilled in the art, the frame of a MPEG system is divided into multiple macroblocks (MB) for being compressed. As shown, there are three frames P
0
, P
1
and P
2
in FIG.
6
. The macroblock MBC in frame P
1
is a B-type macroblock, which is determined, during compressing process, by the motion vectors mvf and mvb of the macroblocks MBF and MBB, which are most similar to the macroblock MBC, in the frames P
0
and P
2
, respectively. Therefore, in decompressing, these two motion vectors and corresponding difference data are sent to the MPEG decoder. As shown in
FIG. 7
, based on the motion vectors mvf and mvb, the corresponding macroblocks MBF and MBB can be read from the frames P
0
and P
2
, respectively. Further with the use of the difference data, the original macroblock MBC can be reconstructed. If the macroblock MBC is a P-type macroblock, it can be dtetermined, during compressing process, by a motion vector mvf of the macroblock MBF, which is most similar to the macroblock MBC, in the frame P
0
. Therefore, in decompressing, the motion vector and difference data are sent to the MPEG decoder. As shown in
FIG. 8
, based on the motion vector mvf, the corresponding macroblock MBF can be read from the frame P
0
. Further with the use of the difference data, the original macroblock MBC can be reconstructed. As a result, the whole frame can be reconstructed and displayed realistically with least amound of data in transmission.
Moreover, in a video decompressing system, the frames that are involved in the decompressing process, are typically stored in DRAM. Therefore, in order to perform the motion compensation, the video decompressing system has to read the reference macroblock from DRAM, and then write data back to the DRAM when completing the motion compensation operation.
In DRAM operation, a page mode is usually selected for effectively utilizing the bandwidth in memory access. As to the DRAM architeture, each line of the DRAM is able to store
2
n
bytes of data in a row.
FIG. 9
shows a 1M×16 bit DRAM stored with several MPEG reference frames. Because the reference frame used in the MPEG system needs to be read out again generally by taking a data block of 17×17 bytes as a unit, the DRAM layout is usually arranged in such a manner that two memory blocks are continuously allocated with a pre-determined length, for example 360 words (each word has two bytes), from the starting address for storing I-type and P-type reference frames, for example frames
91
and
92
. The decompressing frame, such as the B-type frame
93
, is stored in the remaining memory area that is at right side of the reference frames. As such, the access to the memory generally does not cause a page break problem which may result in a poor utilization in memory bandwidth. Furthermore, the arrangement of the reference frames stored in the DRAM is similar to that of the original one. Therefore, the generation of addresses for read or write operation is simple and easy.
However, with the aforementioned DRAM layout for storing the reference frames, the line of the frame data needs to be folded up for storing when the width of the frame is greater than the pre-determined length of DRAM. Thus, the page break problem is encountered when reading the data of the reference frames, and further results in insufficient DRAM bandwidth and damaging the desompressing process. Therefore, there is a desired for the above video decompressing systems to be improved.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a video decompressing system with high-efficiency memory access capability, such that the memory bandwidth is effectively utilized and the performance of decompression is significantly increased.
According to an embodiment of the present invention, the video decompressing system with efficienct memory access capability comprises a decompressing means, a memory device for storing reference frames which are read out for decompressing, and a memory controller for controlling memory access to the memory device, so as to read data from the memory device for being processed by the decompressing means, thereby reconstructing original frames to be stored in the memory device. The reference frame has its pixels arranged as a plurality of horizontal lines for being stored in the memory device. If the pixels of one horizontal line can not be integrally stored in one row of the mempry device, the horizontal line is broken into at least two lines for being stored in the rows of the memory device. At the end portion of the row where the horizontal line is broken, a tail section is allocated for duplicating and storing pixels that are the same as those of a macroblock at a starting position of the next row.
In another embodiment of the present invention, the reference frame has its pixels arranged as a plurality of macroblock lines for being stored in the memory device. If the pixels of one macroblock line can not be integrally stored in one macroblock row of the mempry device, the maroblock line is broken into at least two lines for being stored in the macroblock rows of the memory device. At the end portion of the macroblock row where the macroblock line is broken, a tail section is allocated for duplicating and storing pixels that are the same as those with a length of a macroblock at a starting position of the next macroblock row.
In a further embodiment of the present invention, the reference frame has its pixels arranged as a plurality of horizontal lines for being stored in the memory device in a linear address mode. At the end of each row of the memory device, a tail section is allocated for duplicating and storing pixels that are the same as those of a macroblock at the starting position of the next row.
Other objects, advantages, and novel features of the invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.
REFERENCES:
patent: 6301299 (2001-10-01), Sita et al.
patent: 6356587 (2002-03-01), Choi
patent: 6370192 (2002-04-01), Pearlstein et al.
patent: 6584154 (2003-06-01), Wu
Chen Wen-Kuan
Wu Wei-Shiou
Yang Ying-Chih
Bacon & Thomas PLLC
Kelley Chris
Sunplus Technology Co. Ltd.
Wong Allen
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