Video decoder dynamic memory allocation system and method with a

Details Video decoder dynamic memory allocation system and method with a Video decoder dynamic memory allocation system and method with a

1997-07-28

1999-05-11

Tung, Kee M.

Computer graphics processing and selective visual display system

Computer graphic processing system

Plural graphics processors

345202, 345513, G06T1/60

Patent

active

059032820

ABSTRACT:
A video decoder which uses a dynamic memory allocation scheme having additional buffer read pointers for implementing a freeze mode. The additional buffer read pointers advantageously allow for implementation of a freeze mode on a dynamic memory allocation architecture. In one embodiment, the video decoder includes an MPEG bitstream decoder, FIFO buffer logic, a free segment register, and a display processor. The video decoder decodes an encoded bitstream to obtain image data for storage in an external memory, and the display processor retrieves the image data for display on a monitor. To conserve memory, the bitstream decoder stores only anchor frames as complete images in the external memory, and bi-directional images are stored in dynamically allocated memory segments. Free memory segments are determined by examination of a free segment register, and pointers to the memory segments having image data are passed to the display processor via the FIFO buffers. The display processor removes pointers to memory segments from the FIFO buffers and de-allocates the corresponding memory segments in normal operation. In freeze mode, the display processor leaves the pointers to the memory segments in the FIFO buffer and discontinues the de-allocation. The additional read pointers are used to "loop" through the pointers held in the FIFO buffer to allow the display to continually re-scan the frozen image.

REFERENCES:
patent: 5818533 (1998-10-01), Auld et al.

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