Computer graphics processing and selective visual display system – Computer graphic processing system
Reexamination Certificate
2002-02-28
2003-05-20
Bella, Matthew C. (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphic processing system
Reexamination Certificate
active
06567091
ABSTRACT:
CROSS REFERENCES TO RELATED APPLICATION
The following applications are related to the present application, and are hereby incorporated by reference as though fully and completely set forth herein:
Ser. No. 08/340,667 titled “Integrated Video and Memory Controller With Data Processing and Graphical Processing Capabilities” and filed Nov. 16, 1994 (5143-00100)
Ser. No. 08/463,106 titled “Memory Controller Including Embedded Data Compression and Decompression Engines” and filed Jun. 5, 1995 (5143-00200)
Ser. No. 08/916,464 titled “Memory Controller Including Embedded Data Compression and Decompression Engines” and filed Aug. 8, 1997 (5143-00201)
Ser. No. 08/522,129 titled “Memory and Graphics Controller Which Performs Pointer-Based Display List Video Refresh Operations” and filed Aug. 31, 1995 (5143-00300)
Ser. No. 08/565,103 titled “Memory and Graphics Controller Which Performs Pointer-Based Display List Video Refresh Operations” and filed Nov. 30, 1995 (5143-00301)
Ser. No. 08/770,017 titled “System and Method for Simultaneously Displaying a Plurality of Video Data Objects Having Different Bit Per Pixel Formats” and filed Dec. 19, 1996 (5143-00302).
Ser. No. 08/604,670 titled “Graphics System Including a Virtual Frame Buffer Which Stores Video/Pixel Data in a Plurality of Memory Areas” and filed Feb. 21, 1996 (5143-00303).
Ser. No. 09/291,366 titled “Graphics System and Method for Rendering Independent 2D and 3D Objects Using Pointer Based Display List Video Refresh Operations” and filed Apr. 14, 1999 (5143-01101).
Ser. No. 09/056,021 titled “Video/Graphics Controller Which Performs Pointer-Based Display List Video Refresh Operations” and filed Apr. 6, 1998 (5143-01200).
FIELD OF THE INVENTION
The present invention relates to system video/graphics system architectures, and more particularly to a video/graphics controller which performs pointer-based display list refresh operations to transfer video data from a memory to a display device, such as a television screen or a video monitor.
DESCRIPTION OF THE RELATED ART
Digital display devices such as computer systems and digital televisions generally include a memory area, often referred to as a frame buffer, which stores the image or video portion which is currently being displayed. For example, in a computer system, the frame buffer is typically stored in a separate VRAM memory, or in the system memory. The graphics or video controller device reads the pixel data stored in the frame buffer and in turn generates the appropriate video signals to drive the display monitor. In a similar manner, digital television systems include a memory which serves as a frame buffer, wherein the memory stores the current image or video portion being displayed, or stores an inset or subset image which is being displayed in a larger image.
Computer systems, digital televisions, and other digital display devices are being called upon to display images with increased graphics requirements. For example, in computer systems, software applications typically include graphical user interfaces (GUIs) which place increased burdens on the graphics capabilities of the computer system. Further, the increased prevalence of multimedia applications also demands computer systems with more powerful graphics capabilities. Modem digital television systems, including interactive television systems, also have increased video display requirements.
The anticipated merging of the digital television and computer system markets will require new technology to efficiently integrate digital television, computer systems, and Internet/communications technology. One problem in particular that will need to be addressed is how to efficiently combine multiple video and graphics sources when each source has its own independent frame rate. Therefore, a graphics system and a method capable of providing increased performance while efficiently combining multiple video and graphics sources with independent frame rates are desired.
SUMMARY OF THE INVENTION
The present invention comprises an integrated memory/graphics controller (also referred to herein as an Integrated Memory Controller, Interactive Media Controller, or IMC) which utilizes a novel video display refresh list (VDRL) system and method for presenting data on a display device or video monitor, such as a computer video monitor or television. The memory/graphics controller of the present invention minimizes data movement and manipulation for video display and thus greatly increases system performance.
In one embodiment, the VDRL comprises a plurality of pointers that point to span line segments of graphics data stored in memory (e.g., a frame buffer or system memory). The VDRL is “executed” by reading the graphics data pointed to by the pointers and then outputting the data to a display device. Advantageously, by using pointers in the VDRL, the graphics data need not be stored in contiguous memory locations (as with a traditional frame buffer).
When an application program indicates that a particular object is to be displayed (e.g., a rendered three-dimensional graphics object), the graphics controller (e.g., under the control of the device driver) may then create an object display list subroutine (ODL) that is responsible for rendering the object into memory at the correct frame rate. Multiple ODLs may exist any one time. For example one ODL may be responsible for drawing the three-dimensional object previously mentioned into memory at ten frames per second, while a second ODL may be responsible for receiving and performing MPEG decompression on a digital video stream from the Internet at fifteen frames per second. In one embodiment, after an ODL completes drawing a frame of the object into memory, the ODL may be configured to set an interrupt or may change a value in an input/output register or memory location indicating that a new frame of the object is ready to be displayed.
Since ODLs may be allocated for more than one buffer, advanced graphics features such as motion estimation and multiple-frame animation may be implemented using the ODLs. In one embodiment, ODLs with multiple buffers may have static pointers that each point to one of the buffers. The ODLs may then have a dynamic pointer which indicated which static pointer is to be used. Thus, animation be accomplished by drawing each frame to be animated into its own buffer, and then rotating through the buffers using the dynamic pointer.
The graphics controller may be further configured to utilize draw display lists (DDLs) to incorporate the objects drawn by the ODLs into the image draw when the VDRL is executed. The DDLs may be repeatedly executed at whatever speed the graphics controller is capable of. For example, the ODLs may be executed at their predetermined frame rate (i.e., ten and fifteen times per second in the example above), the VDRL may be executed at the display device's refresh rate (e.g., 70 times per second), and the DDL may be executed as often as possible given the hardware of the graphics controller. The DDL may comprise a plurality of pointers to buffers in memory. When the DDL is executed, it is configured to draw into one of the buffers. When drawing into the buffers, the DDL may execute graphics commands and may incorporate graphics data from the ODL memory buffers also. For example, a particular DDL may draw a window into memory, wherein the window comprises a digital video ODL (DV-ODL), and three-dimensional rendered ODL (3D-ODL) overlaid on top of the digital video, and a number of two-dimensional controls. The DDL may comprise pointers to the two ODLs, instructions on how to overlay them, and instructions for drawing the controls.
When a DDL has completed an execution cycle, like the ODLs it too may be configured to assert an interrupt bit. The interrupt bit may be used by the graphics controller when constructing the VDRL to ensure that the scan line segment pointers in the VDRL point to the most recently completed buffer drawn by the DDL.
In one embodiment, the graphics controller of the present invention comprises an IMC, which includes
Alvarez, II Manuel J.
Dye Thomas A.
Geiger Peter D.
Adams Michael P.
Bella Matthew C.
Interactive Silicon, Inc.
Monestime Mackly
Winstead Sechrest & Minick P.C.
LandOfFree
Video controller system with object display lists does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Video controller system with object display lists, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Video controller system with object display lists will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3017677