Video bit stream decoding system and method used in a video...

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

Reexamination Certificate

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Details

C375S240000, C375S240010, C375S240120, C375S240230

Reexamination Certificate

active

07154953

ABSTRACT:
The invention relates to a decoding apparatus and same method for decoding a video bit stream. The apparatus decodes an encoded video bit stream to produce pixel data of a first and second macroblocks. The video bit stream comprises at least one video packet, a first, second, third logic units. The first logic unit comprising parameters a1and b1.The second logic unit comprises parameters a2and b2.The third logic unit comprises parameters a3and b3.The parameters a1and a2are used for reconstructing a first macroblock. The parameters b1and b2are used for reconstructing a second macroblock. The video decoding apparatus comprises a searching module and a decoding module. The searching module locates a first address indicating location of the first logic unit, a second address indicating location of the second logic unit, and a third address indicating location of the third logic unit. The decoding module first decodes the first logic unit to obtain a decoded parameter A1corresponding to the parameter a1without obtaining and storing a decoded parameter B1corresponding to the parameter b1into a memory. The decoding module also decodes the second/third logic unit to obtain a decoded parameter A2/A3corresponding to the parameter a2/a3. Then, the decoded parameters A1, A2, and A3are used to produce the pixel data of the first macroblock.

REFERENCES:
patent: 6631163 (2003-10-01), Peng

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