Video amplifier circuit with gain and alignment control

Amplifiers – With semiconductor amplifying device – Including differential amplifier

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348678, H03F 345

Patent

active

054062217

ABSTRACT:
The circuit comprises two substantially identical stages (8a, 8b). Each of these two stages (8a, 8b) respectively comprises an input point (10a, 10b) and an output point (11a, 11b) and is arranged to produce, at its output point (11a, 11b), a voltage having an adjustable mean value and variations which are amplified with respect to the variations in the voltage at its respective input point (10a, 10b) with a gain controlled by a gain control signal (Vcg1, Vcg2). The input point (10a) of the first stage (8a) is linked to a decoupling capacitor (30) receiving the input signal (Vin). The output point (11a) of the first stage (8a) supplies the output signal of the circuit (Vout). A comparator (40) is provided for slaving, to a reference voltage (Vref), the voltage at the output point (11b) of the second stage, as well as the mean value of the output signal (Vout).

REFERENCES:
patent: 3512096 (1970-05-01), Nagata et al.
patent: 3727146 (1973-04-01), Smith
patent: 4471320 (1984-11-01), Frey
patent: 5146180 (1992-09-01), Hyakutake
patent: 5218318 (1993-06-01), Ikuzawa
IBM Technical Bulletin vol. 13, No. 8 Jan. 1971 p. 2369.
IBM Technical Bulletin vol. 30 No. 4 Sep. 1987.

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