Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1997-06-10
1999-08-10
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
438723, 438743, 438637, H01L 2100
Patent
active
059358769
ABSTRACT:
A method for forming a semiconductor device having a via by using a composite dielectric layer is disclosed. The method includes forming a first dielectric layer over a first conductive layer disposed on a substrate, where the first dielectric layer has a first etch rate. A second dielectric layer is then formed on the first dielectric layer, where the second dielectric layer has a second etch rate higher than the first etch rate. The second dielectric layer is isotropically removed by masking and etching to form a rounded contoured recess in the second dielectric layer using the first dielectric layer as an etch stop layer. The first dielectric layer is anisotropically removed by masking and etching to form the via in the first dielectric layer, where the bottom of the rounded contoured recess is aligned to the via.
REFERENCES:
patent: 4372034 (1983-02-01), Bohr
patent: 5219791 (1993-06-01), Freiberger
patent: 5234864 (1993-08-01), Kim et al.
Guo Shyh-Jen
Lee Chiarn-Lung
Yeh Wei-kun
Powell William
Taiwan Semiconductor Manufacturing Co. Ltd.
LandOfFree
Via structure using a composite dielectric layer does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Via structure using a composite dielectric layer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Via structure using a composite dielectric layer will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1119827