Via structure of packages for high frequency semiconductor...

Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement

Reexamination Certificate

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C174S262000, C174S264000, C174S266000, C257S698000, C257S700000, C361S780000, C361S794000

Reexamination Certificate

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07154047

ABSTRACT:
A substrate (300) for a package of high frequency semiconductor devices comprising a planar insulating substrate having a plurality of parallel, planar metal layers (301a,301b, etc.) embedded in the insulator. The substrate further has at least one pair of parallel, metal-filled vias (302and303) traversing the substrate; the vias have a diameter and a distance from each other of at least this diameter. The metal in each via has a sheet-like extension (321a,321b, etc.) in each of selected planes of said metal layers, resulting in an increased via-to-via capacitance so that the reflection of a high frequency signal is less than 10%.

REFERENCES:
patent: 6137161 (2000-10-01), Gilliland et al.
patent: 6661316 (2003-12-01), Hreish et al.
patent: 6969808 (2005-11-01), Shiraki
patent: 2003/0151905 (2003-08-01), Gottlieb
patent: 2004/0188826 (2004-09-01), Palanduz et al.
patent: 2005/0063166 (2005-03-01), Boggs et al.
patent: 2005/0248025 (2005-11-01), Tsai et al.

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