Via metallization using metal fillets

Coating processes – Electrical product produced – Condenser or capacitor

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427 90, 427 91, 20419223, 156643, 156644, H01L 21285

Patent

active

046667377

ABSTRACT:
A method is provided for semiconductor manufacture wherein a via is defined and etched through an insulative layer of the device to an underlying conductive region and metal fillets are formed in the corner regions of the via. A conformal metal layer is then deposited onto the device and etched until all metal is removed from the insulative layer surface. Finally, a second metal interconnect layer is deposited onto the device and the desired interconnect pattern is defined. The fillets displace the metal subsequently deposited on the via side surface laterally toward the center of the via, thereby preventing severe self-shadowing problems and improving step coverage of metal into the via.

REFERENCES:
patent: 3756875 (1973-09-01), Eccleston et al.
patent: 4234362 (1980-11-01), Riseman
patent: 4255514 (1981-03-01), Kane
patent: 4322883 (1982-04-01), Abbas et al.
patent: 4378627 (1983-04-01), Jambotkar
patent: 4415606 (1983-11-01), Cynkar
patent: 4448636 (1984-05-01), Baber
patent: 4473598 (1984-09-01), Ephrath
patent: 4518629 (1985-05-01), Jeuch
patent: 4544445 (1985-10-01), Jeuch
patent: 4592802 (1986-06-01), Deleonibus
Defense Publication T 101,201, Issued Nov. 3, 1981 by Anantha et al.

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