Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2000-11-15
2002-08-06
Paladini, Albert W. (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S262000, C257S698000, C438S667000
Reexamination Certificate
active
06429389
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates generally to electronics packaging. More particularly, the present invention relates to apparatus and methods for coupling the electrical contacts of an integrated circuit to bonding pads having vias.
BACKGROUND OF THE INVENTION
Integrated circuits (ICs) are typically assembled into packages that are physically and electrically coupled to a substrate such as a printed circuit board (PCB) to form an “electronic assembly”. The “electronic assembly” can be part of an “electronic system”. An “electronic system” is broadly defined herein as any product comprising an “electronic assembly”. Examples of electronic systems include computers (e.g., desktop, laptop, hand-held, server, etc.), wireless communications devices (e.g., cellular phones, cordless phones, pagers, etc.), computer-related peripherals (e.g., printers, scanners, monitors, etc.), entertainment devices (e.g., televisions, radios, stereos, tape and compact disc players, video cassette recorders, etc.), and the like.
In the field of electronic systems there is an incessant competitive pressure among manufacturers to drive the performance of their equipment up while driving down production costs. This is particularly true regarding the packaging of ICs on substrates, where each new generation of board-level packaging must provide increased performance while generally being smaller or more compact in size.
A substrate typically includes a number of insulation and metal layers selectively patterned to provide metal interconnect lines (referred to herein as “traces”), and a plurality of electronic components mounted on one or more surfaces of the substrate and functionally interconnected through the traces. The routing traces typically carry signals that are transmitted between the electronic components, such as ICs, of the system. Some ICs have a relatively large number of input/output (I/O) pads. The large number of I/O pads requires a relatively large number of routing traces. Some PCBs require multiple layers of routing traces to accommodate all of the system interconnections.
Routing traces located within different layers are typically connected electrically by vias formed in the board. A via can be made by making a hole through some or all layers of a PCB and then coating or plating the interior hole surface with an electrically conductive material, such as copper or tungsten.
In order to fabricate PCBs in which components, including IC packages, are mounted in higher densities, it is known to use a via-in-pad structure. In this structure, the exposed upper surface of certain vias is employed as a land, thus conserving valuable “real estate” on the PCB that would otherwise be separately occupied by the via and the land. The resulting electronic system can be manufactured at a lower cost and in a more compact size, and it is therefore more commercially attractive.
One of the conventional ways of mounting components on a substrate is called surface mount technology (SMT). SMT components have terminations or leads (generally referred to as “electrical contacts”) that are soldered directly to the surface of the substrate. SMT components are widely used because of their compact size and simplicity of mounting. One conventional type of SMT component utilizes a ball grid array (BGA) to connect to the substrate. A BGA component has a plurality of solder balls on one surface, each of which represents an electrical contact. Each solder ball connects to a conductor within the component.
The electrical contacts of an SMT component, such as a BGA component, are coupled to corresponding metallized mounting or bonding pads (also referred to herein as “lands”) on the surface of the substrate, in order to establish a secure physical connection to the substrate as well as to establish an electrical connection between the SMT component and at least one trace connected to the lands. Ordinarily one land is dedicated to one SMT electrical contact.
Prior to mounting the SMT component on a substrate, the substrate lands are selectively coated with solder paste. To mount an SMT component to a substrate, the component is carefully positioned or “registered” over the substrate so that its electrical contacts (e.g. solder balls) are aligned with the corresponding lands. Finally, the solder balls and lands are heated to a temperature that melts the solder balls and the solder paste, so that they physically merge and form proper electrical and physical connections.
In order to selectively coat the substrate lands with solder paste, a layer of solder mask or solder resist material is first applied to the substrate everywhere except the lands. Then, solder paste is applied to the substrate.
Both the solder mask and the solder paste can comprise one or more volatile materials. Such materials include volatile organic compounds (VOCs). One example of such a VOC is polyglycol, which is commonly used in PCB fabrication. Polyglycol has a boiling point of approximately 170 degrees Centigrade compared to the liquidus temperature of approximately 183 degrees Centigrade for solder paste.
For a PCB containing via-in-pads, problems can arise when the solder balls and lands are heated, because uncured or excessive VOC that resides in liquid form within the vias can expand or “outgas” upwards into the overlying solder balls. This causes the solder balls to expand to the point where adjacent solder balls can be left touching, creating short circuits. This phenomenon is referred to as “BGA bridging”. In addition, the outgassing of VOCs can leave voids where the solder balls are supposed to make contact with the vias, creating open circuits.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a significant need in the art for apparatus and methods for coupling an integrated circuit to a substrate that offer relatively high density while providing a relatively high quality interconnection.
REFERENCES:
patent: 4924295 (1990-05-01), Kuecher
patent: 5811736 (1998-09-01), Lauffer et al.
patent: 6171946 (2001-01-01), Tsukamoto
patent: 6187678 (2001-01-01), Gaynes et al.
patent: 6232151 (2001-05-01), Ozmat et al.
Chung Ji Yoon
Joy Stephen C.
Intel Corporation
Paladini Albert W.
Schwegman Lundberg Woessner & Kluth P.A.
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