Coating processes – With post-treatment of coating or coating material – Plural film forming coatings wherein one coating contains a...
Reexamination Certificate
1998-06-24
2001-03-27
Talbot, Brian K. (Department: 1762)
Coating processes
With post-treatment of coating or coating material
Plural film forming coatings wherein one coating contains a...
C427S097100, C427S079000, C216S017000, C216S018000, C216S039000, C156S922000
Reexamination Certificate
active
06207234
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to multilayer devices. More particularly, though not exclusively, the present invention relates to a method and apparatus for forming vias in multilayer devices.
2. Problems in the Art
Traditionally, inductive components are made with wire wound around a core, either magnetic for high inductance or non-magnetic for low inductance. Winding is typically done by hand or by a specially designed machine. However, this process limits the potential of miniaturization to meet the increasing demand for high density surface mount components. New types of inductive components, namely surface mount types, are needed to meet the demand in the industry.
Different types of low inductance planar inductors have been made into single layer surface mount chips. However, higher inductance values cannot be achieved with this configuration. The inductance of an inductor is proportional to the effective cross sectional area as well as the number of turns in the inductor. Increasing the number of turns on the same planar layer reduces the effective magnetic cross sectional area. A third dimension in thickness can be utilized for the advantage of adding turns to the inductor while maintaining the cross sectional area.
To utilize the multilayer process for inductors, interconnections between layers to form a continuance coil are necessary for high inductance values. Conventional interconnection between layers in a multilayer device is typically achieved through vias formed either by a mechanical punch, chemical etch, or laser. Once the vias are formed, they are filled with a conductor. Devices utilizing this process may include printed circuit boards, integrated circuit packages, multilayer ceramic inductors, RF filters or beads, etc.
Due partly to the complexity and durability of a mechanical punch, a punch is very expensive to fabricate and maintain. The fastest laser via formation is currently approximately 200 per second, which is still too slow for some multilayer devices. Chemical etches are even slower. In the competitive chip bead/inductor market, these techniques are not suitable for high speed mass production. Therefore, there is a desire for a technique of via formation which is fast, reliable, and economical.
Similar to the inductors described above, capacitors have also been manufactured in the form of surface mountable chips using multilayer ceramic processes. In the manufacturer of multilayer ceramic capacitors, absolute insulation between the layers of dielectric is required. Occasionally, some lumps are formed in the printed electrode due to conglomerated particles in electrode ink or debris from undesired sources. When the ceramic slurry is cast over the lumpy electrode in the wet stack process, it tends to make shorts in the capacitor. Similar shorts also occur in dry sheet or tape process capacitors (described below). This is undesired and uncontrolled, and therefore is a random phenomena. Manufacturers of such devices strive to keep lumps much smaller than the dielectric thickness in order to make quality components.
The fabrication of typical prior art components will now be described. Multilayer ceramic inductors or chip beads are fabricated with alternate layers of ceramic and conductor loops interconnected through layers. This fabrication can be categorized primarily into two types of techniques. The first technique is a tape (also called dry-sheet) process. A second technique is a wet stack process.
The tape process involves tape casting, tape drying, cutting, stacking, conductor printing, conductor drying, . . . stacking, conductor printing, conductor drying, stacking, laminate-pressing, dicing, organic burn-out, and firing. Another variation of the taped process includes tape casting, tape drying, conductor printing, conductor drying, tape storing, stack laminating/pressing, carrier releasing, dicing, organic burnout, and firing. In the manufacture of components with interconnections, a via punch process is required either after the tape drying or cutting and a via filling before or simultaneously with the conductor printing. A precise and consistent registration is essential for this operation. As mentioned previously, the via formation can be accomplished by a mechanical punch, a laser, or by a chemical etch. As mentioned, the cost of tooling fabrication and maintenance for a mechanical punch is very expensive. A punch has a relatively short life span. Chemical etches take long period of time and are difficult to control. A thorough rinse is necessary which again takes time. The via formation by lasers is still slow and difficult to maintain a throughput of thousands of vias per second for mass production. However, the advantages of the taped process are flexibility, fast taped casting, fast drying with good quality, precise and accurate tape thickness.
In the wet stack process, ceramic layers are cast or printed onto a substrate and dried. The conductors are then printed and dried, and cast and printed again. For interconnections, a via or an exposed area is needed to bridge the conductors across the insulation layer. This is not easily accomplished by ceramic casting. Normally, a blocking of the ceramic print is employed to leave an exposed area, or via. The advantage of this process is the ease of conductor registration. This is accomplished through the registration of the substrate, normally a metal plate. However, the ceramic ink suitable for repeatable screen printing and production is required to be a slow dry ink and have low viscosity for good leveling. If not, the screen can get clogged up which deteriorates the print quality or demands periodic screen cleaning which takes time. In addition, due to the slow dry time and low viscosity of the ink, the wet ceramic print will tend to flow. The print registration as well as quality is affected. A worse case scenario may be that the via is completely blocked with the flow. To overcome the tendency to flow while maintaining a slow dry, the ceramic ink is formulated in a higher viscosity form or a more psuedoplastic form with high molecular weight organic binders and additives. These organics make the drying and burnout even more difficult. The slow dry characteristic coupled with the high molecular weight organics of printable ink requires a prolonged drying at high temperatures. This drying cycle may cause hardened skin on the ceramic layer and subsequently result in cracks or delamination.
Various prior art techniques have been used to form vias in multilayer components. Following are some examples. U.S. Pat. No. 4,689,594 issued to Kawabata et al. discloses a process of fabricating multilayer chip coils by stacking magnetic tape with conductor path interconnected via holes coated with electroconductive material. U.S. Pat. No. 5,300,911 issued to Walters discloses monolithic magnetic devices made from ceramic sheets with through holes plated with copper conductors. U.S. Pat. No. 4,322,689 to Takahashi et al. discloses block-printing a magnetic layer to cover the lower half of a conductive coil, leaving an exposed segment of the coil to be connected to the next coil. The upper half of the conductive coil is partially covered by printing another magnetic layer. Repeating this alternating print pattern fabricates a laminated inductor component. U.S. Pat. No. 4,731,297 issued to Takaya discloses a similar method of altering the halves of superimposed ferrite and coil prints to manufacture laminated components. U.S. Pat. No. 5,302,932 issued to Person et al. discloses a process for making monolithic multilayer chip inductors having printed magnetic layers with vias and subsequently filling the vias by screen printing.
Prior art fabrication techniques for multilayer components, including ceramic inductors/beads, can be slow, difficult and/or expensive. Prior techniques do not satisfy the demand of the surface mount industry. Manufacturers using these prior art techniques cannot produce a high volume of components to match other surface moun
Talbot Brian K.
Vishay Vitramon Incorporated
Zarley McKee Thomte Voorhees & Sease
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