Via antenna fix in deep sub-micron circuit designs

Details Via antenna fix in deep sub-micron circuit designs Via antenna fix in deep sub-micron circuit designs

2011-08-09

2011-08-09

Vu, Hung (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

With particular power supply distribution means

C257S208000

Reexamination Certificate

active

07994543

ABSTRACT:
A filler cell for use in fabricating an integrated circuit. The filler cell couples a power supply rail of an adjacent logic cell to a power supply rail of another adjacent logic cell. The filler cell also has a diode to bleed charge accumulated on the power rails of the adjacent logic cells to the substrate. The diode is reverse biased during normal integrated circuit operation. A method for fabricating an integrated circuit with a power grid. At least one filler cell is placed on the integrated circuit to bleed away charge accumulated on the power grid during the fabrication of the integrated circuit. The filler cell is connected to a supply rail of an adjacent logic cell.

REFERENCES:
patent: 5393701 (1995-02-01), Ko et al.
patent: 5500542 (1996-03-01), Iida et al.

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