VGA-CTF combination cell for 10 Gb/s serial data receivers

Details VGA-CTF combination cell for 10 Gb/s serial data receivers VGA-CTF combination cell for 10 Gb/s serial data receivers

2006-04-25

2006-04-25

Lam, Tuan T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

Nonlinear amplifying circuit

C330S254000, C330S278000

Reexamination Certificate

active

07034606

ABSTRACT:
An input processing circuit includes a first and second input transistors for receiving a differential pair of first and second input signals, respectively. At least one resistor is coupled between first terminals of the first and second input transistors. The input processing circuit includes a variable gain amplifier (VGA) circuit. At least one first transistor has a gate terminal, and is coupled between the first terminals of the first and second input transistors. At least one second transistor has a gate terminal, and is coupled between the first terminals of the first and second input transistors. A gate switch is coupled to the gate terminal of the at least one second transistor. The at least one first transistor and the at least one second transistor adjust a gain of the input processing circuit in response to a control voltage. The control voltage is applied to the gate terminal of the at least one first transistor, and the control voltage is applied to the gate terminal of the at least one second transistor through the gate switch.

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Mohan, Sunderarajan S., et al, “Bandwidth Extension in CMOS with Optimized On-chip Inductors,” IEEE Journal of Solid-State Circuits, vol. 35, No. 3, Mar. 2000, pp. 346-355.

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