VGA controller using address translation to drive a dual scan LC

Details VGA controller using address translation to drive a dual scan LC VGA controller using address translation to drive a dual scan LC

1993-11-03

1995-02-07

Weldon, Ulysses

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

345 98, G09G 336

Patent

active

053879236

ABSTRACT:
A VGA controller using address translation logic to drive a dual scan LCD panel is disclosed. The address translation logic converts the display data into an interleaved format in the display buffer, allowing the VGA controller to simultaneously access the display data for both LCD inputs without the need for a separate half-frame buffer memory. Elimination of this half-frame buffer memory reduces system cost with no reduction in performance of the VGA controller.

REFERENCES:
patent: 4630122 (1986-12-01), Morokawa
patent: 4679043 (1987-07-01), Morokawa
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patent: 4816816 (1989-03-01), Usui
patent: 4824212 (1989-04-01), Taniguchi
patent: 4845473 (1989-07-01), Matsuhashi et al.
patent: 4875036 (1989-10-01), Washizuka et al.
patent: 4985698 (1991-01-01), Mano et al.
patent: 5148155 (1992-09-01), Martin et al.

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