Very low-input capacitance self-biased CMOS buffer amplifier

Details Very low-input capacitance self-biased CMOS buffer amplifier Very low-input capacitance self-biased CMOS buffer amplifier

1994-01-21

1996-02-13

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Signal transmission integrity or spurious noise override

327437, 327328, H03K 17687

Patent

active

054914434

ABSTRACT:
A low-input capacitance self-biased CMOS buffer amplifier (10) which buffers a low-amplitude capacitively coupled output of a sensor to subsequent output circuitry. The buffer amplifier (10) includes a buffer stage (12) which includes an input FET (16) whose gate terminal is connected to the output of the sensor. In order to eliminate the gate-to-source, gate-to-drain and gate-to-substrate capacitances of the input FET (16), various FETs are associated with the buffer stage (12) are interconnected such that the integrity of the input signal is maintained. An output FET (18) has its source terminal connected to the source terminal of the input FET (16). Additionally, a tail cascoded current source (20, 22) is connected to the source terminals of the input and output FETs (16, 18) such that the gate-to-source voltages of these two FETs (16, 18) is the same. The gate terminal and the drain terminal of the output FET (18) are connected such that the input and output FETs (16, 18) act as unit to gain amplifier. The gate terminal of the output FET (18) is connected to two other FETs (24, 26) which transfer the gate-to-drain voltage of the output FET (18) to the drain terminal of the input FET (16). In order to eliminate the gate-to-substrate capacitance, the gate terminal of the input FET (16) is shielded from the substrate by a bottom metal layer (28) of this FET (16). Several self-biasing features are provided to interconnect the FETs in the circuit such that a common current flow is maintained throughout the buffer stage (12).

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W. Yun, R. T. Howe and P. R. Gray, "Surface Micromachined, Digitally Force Balanced Accelerometer With Integrated CMOS Detection Circuitry," Tech Digest, Solid State Sensors and Actuators Workshop, Hilton Head, S.C., pp. 126-131, Jun. 1992.

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