Stock material or miscellaneous articles – Web or sheet containing structurally defined element or... – Physical dimension specified
Reexamination Certificate
1999-06-14
2001-08-14
Turner, Archene (Department: 1775)
Stock material or miscellaneous articles
Web or sheet containing structurally defined element or...
Physical dimension specified
C427S255120, C428S209000, C428S446000, C428S472000, C428S698000, C438S663000, C438S674000, C438S680000, C438S684000
Reexamination Certificate
active
06274234
ABSTRACT:
TECHNICAL FIELD
The present invention concerns atomic wires of great length and great stability as well as a method of manufacturing these wires.
The invention applies particularly to the field of nano-electronics, optics and micromechanics.
PRIOR ART
Various works have been devoted to the manufacture of atomic wires on metal surfaces or semiconductor surfaces.
The formation of atomic wires results from processes bringing into play the structural, dynamic and reactivity properties of solid surfaces on an atomic scale.
The problem of manufacturing atomic wires is also closely linked to that of the display of these wires formed by atoms.
Because of their sub-nanometric dimensions (less than or equal to 1 nm), the display and inspection of such nano-structures can be achieved only by means of a tunnel-effect microscope.
The main known methods of manufacturing atomic wires are indicated below.
A first known method consists of a controlled deposition of adsorbate on a solid surface.
According to this first known method, by using the anisotropic properties of the solid surfaces and controlling the flow of the adsorbate deposition and the temperature of the substrate, it is possible to construct atomic wires.
The formation of these wires is based either on surface anisotropic bonding coefficients, or on the anisotropy of certain metastable structures, or on an-isotropic diffusion.
In this regard, documents (1) to (5) should be consulted, which, like the other documents cited afterwards, are mentioned at the end of the present description.
A second known method consists of nanolithography with the tip of a tunnel-effect microscope.
The electrons issuing from this tip of the tunnel-effect microscope can be used for producing, on a nanometric scale, a decomposition or desorption reaction.
By moving the tip of the tunnel-effect microscope, it is thus possible to produce atomic wires.
In this regard, reference should be made to document (6).
The compared performances of these known methods are indicated below.
The controlled deposition method makes it possible to manufacture atomic wires all having the same direction over a large surface area.
The composition of these wires can be clearly defined.
However, this method has drawbacks.
This is because the wires obtained are thermally unstable, because notably of the substrates or adsorbates employed.
In addition, the length of these atomic wires is generally limited to a few tenths of a nanometer, and their distribution over the surface is random and therefore not controllable.
In addition, it should be noted that, when the density of these wires on the surface is great, a phenomenon of coalescence of the wires may occur, which results no longer in wires but in a bidimensional set of atoms.
The second known method, mentioned above, makes it possible to manufacture a highly regular lattice of atomic wires.
The length of these wires can, potentially, be high.
However, this second known method has the following drawbacks.
The atomic wires are of poor quality on an atomic scale.
In addition, only a small number of wires can be obtained by this method.
Moreover, this method generally requires a surface at low temperature, below 0° C.
DISCLOSURE OF THE INVENTION
The aim of the present invention is to remedy the above drawbacks.
Its object is first of all atomic wires of great length and great stability.
The invention also concerns a method of manufacturing these wires.
This method is the only one which makes it possible to produce a regular lattice of atomic wires of great length over a large surface area.
In addition, the atomic wires manufactured by virtue of this method all have very high thermal stability, up to a temperature of around 1000° C.; there is no comparison with the thermal stability of the atomic wires obtained with the other known methods, which is around 200° C. in the best cases.
The invention therefore considerably pushes back the limits of stability known at the present time for this type of sub-nanostructure.
Moreover, unlike the known method mentioned above, the method which is the object of the invention makes it possible to control the number of atomic lines or wires by making it possible to obtain assemblies ranging from a super-lattice of atomic wires to an assembly limited to a single atomic wire on a surface.
In precise terms, the object of the present invention is a set of N atomic wires, N being an integer number equal to at least 1, characterised in that these wires are formed on the surface of an SiC substrate and are rectilinear chains of dimers of an element chosen from amongst Si and C, these chains being parallel to each other and substantially equidistant from each other, extending from one end of the substrate to the other and being perpendicular to the direction of the dimers.
According to a first particular embodiment of this assembly, the said surface is a surface of Si-terminated &bgr;-SiC (100), the said chains being chains of Si—Si dimers.
According to a second particular embodiment, the said surface is a surface of C-terminated &bgr;-SiC (100), the said chains being chains of C—C dimers.
The present invention also concerns a method of manufacturing the assembly of N atomic wires which is the object of the invention, characterised in that layers of said element are formed on the said surface, and the said assembly is constructed by means of annealings of this surface provided with the said layers, the last annealing being able to progressively eliminate from this surface, selectively, rows of dimers of the said element so as to obtain the said assembly of N atomic wires.
The temperature and duration of the last of the annealings can be chosen in order to obtain a required number N of atomic wires over a given length, counted perpendicularly to the wires.
Preferably, the said assembly is constructed in a chamber maintained at a pressure below 5×10
−9
Pa or in a neutral atmosphere.
According to a preferred implementation of the method which is the object of the invention, a monocrystalline substrate of SiC is formed in &bgr;-SiC cubic phase (100), this substrate is transformed so that its surface is Si terminated and 3×2 reconstructed, and the substrate thus transformed is annealed at a temperature chosen in the range from 1000° C. to 1150° C. so as to progressively eliminate from the surface, by selective desorption, rows of Si—Si dimers and to obtain the said assembly of N atomic wires.
The time during which the substrate thus transformed is annealed depends on the geometric characteristics of the substrate. This time can be chosen in a range from 5 minutes to 10 minutes.
The said monocrystalline substrate can be obtained by chemical vapour deposition of a first gaseous compound containing carbon and a second gaseous compound containing silicon on a vicinal surface of Si (100) de-orientated by 4°.
The first gaseous compound can be C
3
H
6
and the second gaseous compound can be SiH
4
.
Preferably the said monocrystalline substrate is annealed so that its surface becomes a surface with a carbon-rich 1×1 structure, layers of silicon are deposited on this surface at room temperature and then the substrate provided with these layers of silicon is annealed at approximately 1000° C. in order to obtain a surface of Si-terminated and 3×2 reconstructed &bgr;-SiC (100).
The present invention has many applications.
It can be stated now that it applies to the manufacture of an assembly of wires of a metallic, magnetic, polymeric, organic, semiconducting, insulating or biological material, using the said assembly of N atomic wires as a matrix receiving a deposit of the said material.
The present invention also applies to the parallel addressing of electronic devices whose size is around 0.1 nm to 10 nm, the atomic wires having a thickness of around 0.1 nm to 10 nm.
The atomic wires which are the object of the invention differ from that which has been proposed in the prior art both through the manufacturing method and through the nature of the product obtained.
This is because the choi
Dujardin Gérald
Mayne Andrew
Semond Fabrice
Soukiassian Patrick
Commissariat A l'Energie Atomique
Hayes Soloway Hennessey Grossman & Hage PC
Turner Archene
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