Patent
1989-08-31
1991-02-05
Hille, Rolf
357 68, 357 80, H01L 2316, H01L 3902, H01L 2348, H01L 2944
Patent
active
049910000
ABSTRACT:
A high density IC layout is achieved by providing conductive feedthroughs through an IC chip directly to input/output locations within the circuitry, inward from the periphery of the chip or alternately at the periphery of the chip. The chip can thus be mounted to a substrate face up, allowing for visual inspection and simplified mounting techniques. To provide a high density 3-D stack, substrates with chips mounted thereon are stacked together, with substrate feedthroughs connecting to selected chip feedthrough via the substrate routing, and successive layers electrically connected by contact springs. Chips mounted on a single substrate can also be used in a 2-D configuration, without substrate feedthroughs.
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Pfeiffer et al., "Self-Aligned Controlled Collapse Chip Connect (SAC4)", Journal of the Electro-Chemical Society: Solid-State Science and Technology, Nov. 1987, pp. 2940-2941.
T. Kawanobe, "Interconnection of Semiconductor Elements to Ceramic Substrates", Ceramics Japan, Mar. 1986, pp. 201-206, (Japanese and English Translation).
Armstrong W. E.
Bone Robert L.
Denson-Low W. K.
Gudmestad Terje
Hille Rolf
Ostrowski D.
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