Vertical twist scheme for high-density DRAMs

Details Vertical twist scheme for high-density DRAMs Vertical twist scheme for high-density DRAMs

2007-08-21

2007-08-21

Andujar, Leonardo (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S774000

Reexamination Certificate

active

09567673

ABSTRACT:
An interconnection array subunit and method for forming the interconnection array subunit are provided, the interconnection array subunit including a first pair of line conductors in first and second regions, the first pair of line conductors including a first true line conductor and a first associated complementary line conductor connected and vertically twisted in a vertical twisting region between the first and second regions. The interconnection array subunit also includes a second pair of line conductors adjacent to the first pair of line conductors in the first and second regions, the second pair of line conductors including a second true line conductor and a second associated complementary line conductor. The interconnection array subunit also includes a first interconnection layer disposed in the vertical twisting region, the first interconnection layer connecting the second associated complementary line conductor in the first region to the second associated complementary line conductor in the second region. The interconnection array subunit also includes a second interconnection layer disposed in the vertical twisting region, the second interconnection layer connecting the second true line conductor in the first region to the second true line conductor in the second region. The first true line conductor is disposed below the first associated complementary line conductor in the first region and above the first associated complementary line conductor in the second region. The second true line conductor is disposed below the second associated complementary line conductor in the first and second regions.

REFERENCES:
patent: 4914502 (1990-04-01), Lebowitz et al.
patent: 5010524 (1991-04-01), Fifield et al.
patent: 5026657 (1991-06-01), Lee et al.
patent: 5057449 (1991-10-01), Lowrey et al.
patent: 5087951 (1992-02-01), Chance et al.
patent: 5097441 (1992-03-01), Cho et al.
patent: 5107459 (1992-04-01), Chu et al.
patent: 5134085 (1992-07-01), Gilgen et al.
patent: 5214601 (1993-05-01), Hidaka et al.
patent: 5250457 (1993-10-01), Dennison
patent: 5252504 (1993-10-01), Lowrey et al.
patent: 5262343 (1993-11-01), Rhodes et al.
patent: 5272367 (1993-12-01), Dennison et al.
patent: 5292677 (1994-03-01), Dennison
patent: 5300814 (1994-04-01), Matsumoto et al.
patent: 5488583 (1996-01-01), Ong et al.
patent: 5534732 (1996-07-01), DeBrosse et al.
patent: 5585285 (1996-12-01), Tang
patent: 5605857 (1997-02-01), Jost et al.
patent: 5864181 (1999-01-01), Keeth
patent: 6043562 (2000-03-01), Keeth
“A Novel Architecture For Advanced High Density Dynamic Random Access Memories.” Thesis by Brent Keeth, May 1996.
“A Twisted Bit Line Technique for Multi-Mb DRAMs” by Yoshihara et al, 1998 IEEE International Solid-State Circuits Conference Digest of Technical Papers, pp. 3-4.
“A 33nd 64 Mb DRAM,” by Oowaki et al., 1991 IEEE.
“A Novel Architecture for Advanced High Density Dynamic Random Access Memories,” Thesis by Brent Keeth, May 1996.
“A Twisted Bit Line Technique for Multi-Mb DRAMs,” by Yoshihara et al., 1998 IEEE Int'l Solid-State Circuits Conference Digest of Technical Papers, pp. 3-4.
“A 33ns 64 Mb DRAM,” by Oowaki et al., 1991 IEEE.

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