Vertical transistor structure

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357 44, H01L 2972

Patent

active

048110710

ABSTRACT:
Vertical transistor structure with an epitaxially applied layer of the second conduction type on a semiconductor substrate of the first conduction type, in which a tray is formed by insulating walls of the first conduction type extending into the semiconductor substrate. A first highly doped buried layer of the second conduction type in which a second buried layer of the first conduction type extending into the epitaxial layer of the first conduction type is embedded insulated from the semiconductor substrate. Three doped zones of which one, of the second conduction type, is provided for the base terminal and one of the first conduction type for the emitter and collector terminal, and a zone connecting the collector terminal zone and the second buried layer, of the first conduction type, where these regions form the collector. The emitter zone and the collector terminal zone are arranged above opposite end regions of the second buried layer.

REFERENCES:
patent: 3595713 (1971-07-01), de Brebisson et al.
patent: 3595715 (1971-07-01), Thire et al.
patent: 3622842 (1971-11-01), Oberai
patent: 4038680 (1977-07-01), Yagi et al.
patent: 4260999 (1981-04-01), Yoshioka
IBM Technical Disclosure Bulletin, vol. 13, No. 5, Oct. 1970 "Epitaxial Base Transistor" by M. B. Vora.

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