Vertical synchronous signal separation apparatus

Television – Synchronization – Sync separation

Patent

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Details

348525, H04N 508, H04N 510

Patent

active

054671400

ABSTRACT:
A vertical synchronous signal separation circuit is disclosed wherein the circuit includes a vertical synchronous pulse removal circuit for delaying original horizontal and vertical synchronous signals separated from a composite video signal by a predetermined time period in response to a reference clock signal and logically combining the original horizontal and vertical synchronous signals with the delayed horizontal and vertical synchronous signals to remove vertical synchronous pulses therefrom, a clock generator for logically combining an output signal from the vertical synchronous pulse removal circuit with the reference clock signal to generate a clock signal, an edge detector for detecting edges of the output signal from the vertical synchronous pulse removal circuit and outputting the detected edges as a reset signal, and a vertical synchronous signal extractor for extracting a stable vertical synchronous signal from the original horizontal and vertical synchronous signals in response to the clock signal from the clock generator and the reset signal from the edge detector.

REFERENCES:
patent: 3925613 (1975-12-01), Kokudo

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