Vertical synchronizing signal separating circuit

Details Vertical synchronizing signal separating circuit Vertical synchronizing signal separating circuit

1986-05-19

1987-09-15

Groody, James J.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358153, 328139, H04N 510

Patent

active

046943404

ABSTRACT:
A vertical synchronizing signal separating circuit comprises a series circuit including a pair of flip-flops coupled in series for generating a first pulse signal which is in phase synchronism with leading edges of a composite synchronizing signal and has a pulse width corresponding to one period of clock pulses supplied thereto, a first latch circuit for latching the composite synchronizing signal by trailing edges of the first pulse signal so as to produce a second pulse signal having a predetermined level when the composite synchronizing signal has a pulse width greater than that of a horizontal synchronizing signal thereof, and a second latch circuit for latching the second pulse signal by trailing edges of the composite synchronizing signal and for producing an output pulse signal thereof as a vertical synchronizing signal separated from the composite synchronizing signal. The first latch circuit produces the second pulse signal which does not respond to a horizontal synchronizing signal nor an equalizing pulse of the composite synchronizing signal, so that generation of a jitter by the clock pulses is prevented.

REFERENCES:
"A Digital Separator for TV Field Synchronizing Pulses"; by A. Racciu; Alta Frequenza (Italy); vol. XXXIX, No. 8, Aug. 1970, pp. 741-742.

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