Vertical synchronizing signal detector circuit

Details Vertical synchronizing signal detector circuit Vertical synchronizing signal detector circuit

1979-09-27

1980-12-09

Martin, John C.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358158, H04N 510

Patent

active

042387701

ABSTRACT:
There is disclosed a vertical synchronizing signal detector circuit for use with a PCM recording/reproducing system which records and reproduces audio signals with pulse code modulation by the use of a home VTR system or a part thereof. The vertical synchronizing signal detector circuit comprises an input terminal for receiving a composite synchronizing signal including a horizontal synchronizing signal and a vertical synchronizing signal, an output terminal for providing a vertical synchronizing pulse synchronized with the vertical synchronizing signal, a clock pulse generator circuit connected to the input terminal and adapted to generate a clock pulse having half the period of the horizontal synchronizing signal and a phase lag therefrom of one-fourth the period thereof, a vertical synchronizing signal extractor circuit connected to the input terminal and the clock pulse generator circuit and adapted to compare the vertical synchronizing signal with a reference waveform pattern for the vertical synchronizing signal so as to generate a vertical synchronizing signal output synchronized with the vertical synchronizing signal only when the comparison results in a complete coincidence, and a vertical synchronizing signal compensator circuit connected to the vertical synchronizing signal extractor circuit and the clock pulse generator circuit and responsive to the vertical synchronizing signal output to provide this output at the output terminal and simultaneously store the same temporarily, the vertical synchronizing signal compensator circuit being also adapted to provide the stored vertical synchronizing signal output at the output terminal when the vertical synchronizing signal output is not received, whereby the vertical synchronizing pulse is produced at correct timing even if the vertical synchronizing signal is absent in the composite synchronizing signal because of a dropout or the like.

REFERENCES:
patent: 3532810 (1970-10-01), Steinberg

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