Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1986-09-17
1988-12-20
Groody, James J.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
358154, 358155, H04N 508
Patent
active
047928522
ABSTRACT:
A vertical synchronizing signal detection circuit detects a vertical synchronizing signal from a television signal by detecting level of the television signal by sampling the television signal at a plurality of sample points established in a plurality of successive horizontal scanning periods and comparing a pattern of level of the television signal during the successive horizontal scanning periods with a reference pattern on the condition that synchronizing signals each discriminating a horizontal scanning period are accurately detected during these horizontal scanning periods. An erroneous detection of a false vertical synchronizing signal caused by noise or dropout can be prevented.
REFERENCES:
patent: 4238770 (1980-12-01), Kobayashi et al.
patent: 4240111 (1980-12-01), Meise
patent: 4420775 (1983-12-01), Yamazaki et al.
patent: 4464679 (1984-08-01), Wargo
Groody James J.
Harvey David E.
Nippon Gakki Seizo Kabushiki Kaisha
LandOfFree
Vertical synchronizing signal detection circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Vertical synchronizing signal detection circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Vertical synchronizing signal detection circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1912425