Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With base region having specified doping concentration...
Patent
1996-07-26
2000-09-05
Hardy, David
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
With base region having specified doping concentration...
257579, 257583, 257584, 257593, H01L 27082
Patent
active
06114746&
ABSTRACT:
A vertical PNP transistor integrated in a semiconductor material wafer having an N type substrate and an N type epitaxial layer forming a surface. The transistor has a P type buried collector region astride the substrate and the epitaxial layer; a collector sinker insulating an epitaxial tub from the rest of the wafer; a gain-modulating N type buried base region astride the buried collector region and the epitaxial tub, and forming a base region with the epitaxial tub; and a P type emitter region in the epitaxial tub. An N.sup.+ type base sinker extends from the surface, through the epitaxial tub to the buried base region. The gain of the transistor may be modulated by varying the extension and dope concentration of the buried base region, forming a constant or variable dope concentration profile of the buried base region, providing or not a base sinker, and varying the form and distance of the base sinker from the emitter region.
REFERENCES:
patent: 3935587 (1976-01-01), Ostop et al.
patent: 4178190 (1979-12-01), Polinsky
patent: 5060044 (1991-10-01), Tomassetti
patent: 5179432 (1993-01-01), Husher
patent: 5218228 (1993-06-01), Williams et al.
patent: 5274267 (1993-12-01), Moksvold
patent: 5326710 (1994-07-01), Joyce et al.
patent: 5581115 (1996-12-01), Grubisich et al.
patent: 5602417 (1997-02-01), Villa
European Search Report from European Patent Application No. 95830328.1, filed Jul. 27, 1995.
Leonardi Salvatore
Lizzio Pietro
Palara Sergio
Patti Davide Giuseppe
Consorzio per la Ricerca sullla Microelettronica nel Mezzogiorno
Eckert II George C.
Galanthay Theodore E.
Hardy David
Morris James H.
LandOfFree
Vertical PNP transistor and relative fabrication method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Vertical PNP transistor and relative fabrication method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Vertical PNP transistor and relative fabrication method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2215015