Vertical phase adjust circuit

Details Vertical phase adjust circuit Vertical phase adjust circuit

1989-08-18

1991-03-19

Groody, James J.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358148, H04N 504

Patent

active

050015648

ABSTRACT:
A vertical phase adjust circuit with high noise immunity for line locked surveillance cameras. To prevent noise from the AC line producing false output signals, a counter is used to lock out the delayed vertical line locked output signal. The horizontal scan frequency is counted from the time a vertical output is produced, and the vertical output signal is prevented until 98 percent of the period between legitimate vertical signals has elapsed. The circuit also includes a lock detect circuit to increase the time window during startup conditions to assure initial synchronization and an increased phase adjust range to permit synchronization with any other camera.

REFERENCES:
patent: 3761627 (1973-09-01), Schneider
patent: 4012592 (1977-03-01), Ricard
patent: 4025951 (1977-05-01), Eckenbrecht
patent: 4228461 (1980-10-01), Weissmueller
patent: 4383273 (1983-05-01), Lunn
patent: 4498103 (1985-02-01), Aschwanden
patent: 4556905 (1985-12-01), Ikejiri
patent: 4568976 (1986-02-01), Trammell
patent: 4614973 (1986-09-01), Sorenson
patent: 4694256 (1987-09-01), Kawamura
patent: 4791488 (1988-12-01), Fukazawa

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