Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2005-02-08
2005-02-08
Auduong, Gene (Department: 2818)
Static information storage and retrieval
Floating gate
Particular biasing
C365S177000, C365S185030, C257S390000, C438S259000
Reexamination Certificate
active
06853587
ABSTRACT:
Structures and methods for vertical memory cell. The vertical memory cell includes a vertical metal oxide semiconductor field effect transistor (MOSFET) extending outwardly from a substrate. The MOSFET has a first source/drain region, a second source/drain region, a channel region between the first and the second source/drain regions, and a gate separated from the channel region by a gate insulator. A first transmission line is coupled to the first source/drain region. A second transmission line is coupled to the second source/drain region. The MOSFET is adapted to be programmed to have a charge trapped in at least one of a first storage region and a second storage region in the gate insulator and operated with either the first source/drain region or the second source/drain region serving as the source region.
REFERENCES:
patent: 4184207 (1980-01-01), McElroy
patent: 4420504 (1983-12-01), Cooper
patent: 4881114 (1989-11-01), Mohsen
patent: 5241496 (1993-08-01), Lowrey
patent: 5330930 (1994-07-01), Chi
patent: 5378647 (1995-01-01), Hong
patent: 5379253 (1995-01-01), Bergemont
patent: 5386132 (1995-01-01), Wong
patent: 5397725 (1995-03-01), Wolstenholme
patent: 5467305 (1995-11-01), Bertin
patent: 5576236 (1996-11-01), Chang
patent: 5739567 (1998-04-01), Wong
patent: 5768192 (1998-06-01), Eitan
patent: 4755864 (1998-07-01), Ariizumi
patent: 5792697 (1998-08-01), Wen
patent: 5828602 (1998-10-01), Wong
patent: 5858841 (1999-01-01), Hsu
patent: 5911106 (1999-06-01), Tasaka
patent: 5946558 (1999-08-01), Hsu
patent: 5966603 (1999-10-01), Eitan
patent: 5994745 (1999-11-01), Hong
patent: 6011725 (2000-01-01), Eitan
patent: 6028342 (2000-02-01), Chang
patent: 6030871 (2000-02-01), Eitan
patent: 6044022 (2000-03-01), Nachumovsky
patent: 6081456 (2000-06-01), Dadashev
patent: 6108240 (2000-08-01), Lavi
patent: 6133102 (2000-10-01), Wu
patent: 6134156 (2000-10-01), Eitan
patent: 6147904 (2000-11-01), Liron
patent: 6157061 (2000-12-01), Kawata
patent: 6157570 (2000-12-01), Nachumovsky
patent: 6172396 (2001-01-01), Chang
patent: 6174758 (2001-01-01), Nachumovsky
patent: 6175523 (2001-01-01), Yang
patent: 6181597 (2001-01-01), Nachumovsky
patent: 6184089 (2001-02-01), Chang
patent: 6201282 (2001-03-01), Eitan
patent: 6201737 (2001-03-01), Hollmer
patent: 6204529 (2001-03-01), Lung
patent: 6207504 (2001-03-01), Hsieh
patent: 6208557 (2001-03-01), Bergemont
patent: 6215702 (2001-04-01), Derhacobian
patent: 6218695 (2001-04-01), Nachumovsky
patent: 6222768 (2001-04-01), Hollmer
patent: 6240020 (2001-05-01), Yang
patent: 6243300 (2001-06-01), Sunkavalli
patent: 6251731 (2001-06-01), Wu
patent: 6255166 (2001-07-01), Ogura
patent: 6256231 (2001-07-01), Lavi
patent: 6266281 (2001-07-01), Derhacobian
patent: 6269023 (2001-07-01), Derhacobian
patent: 6272043 (2001-08-01), Hollmer
patent: 6275414 (2001-08-01), Randolph
patent: 6282118 (2001-08-01), Lung
patent: 6291854 (2001-09-01), Peng
patent: 6297096 (2001-10-01), Boaz
patent: 6303436 (2001-10-01), Sung
patent: 6327174 (2001-12-01), Jung
patent: 6330184 (2001-12-01), White
patent: 6348711 (2002-02-01), Eitan
patent: 6392930 (2002-05-01), Jung
patent: 6417053 (2002-07-01), Kuo
patent: 6421275 (2002-07-01), Chen
patent: 6429063 (2002-08-01), Eitan
patent: 6432778 (2002-08-01), Lai
patent: 6461949 (2002-10-01), Chang
patent: 6468864 (2002-10-01), Sung
patent: 6469342 (2002-10-01), Kuo
patent: 6477084 (2002-11-01), Eitan
patent: 6486028 (2002-11-01), Chang et al.
patent: 6487050 (2002-11-01), Liu
patent: 6498377 (2002-12-01), Lin
patent: 6514831 (2003-02-01), Liu
patent: 6531887 (2003-03-01), Sun
patent: 6545309 (2003-04-01), Kuo
patent: 6552287 (2003-04-01), Eitan
patent: 6559013 (2003-05-01), Pan
patent: 6576511 (2003-06-01), Pan
patent: 6580135 (2003-06-01), Chen
patent: 6580630 (2003-06-01), Liu
patent: 6583479 (2003-06-01), Fastow et al.
patent: 6602805 (2003-08-01), Chang
patent: 6607957 (2003-08-01), Fan
patent: 6610586 (2003-08-01), Liu
patent: 6613632 (2003-09-01), Liu
patent: 6617204 (2003-09-01), Sung
patent: 6143636 (2003-11-01), Forbes
patent: 20010001075 (2001-05-01), Ngo
patent: 20010004332 (2001-06-01), Eitan
patent: 20010011755 (2001-08-01), Tasaka
patent: 20020027264 (2002-03-01), Forbes
patent: 20020028541 (2002-03-01), Lee
patent: 20020142569 (2002-10-01), Chang
patent: 20020146885 (2002-10-01), Chen
patent: 20020151138 (2002-10-01), Liu
patent: 20020177275 (2002-11-01), Liu
patent: 20020182829 (2002-12-01), Chen
patent: 20030057997 (2003-03-01), Sun
patent: 20030067807 (2003-04-01), Lin
patent: 20030117861 (2003-06-01), Maayan
patent: 84303740 (1985-01-01), None
patent: 90115805 (1991-02-01), None
patent: 1120836 (2001-08-01), None
patent: 01113179 (2002-12-01), None
patent: WO 9806139 (1998-02-01), None
B. Eitan et al., “Characterization of Channel Hot Electron Injection by the Subthreshold Slope of NROM™ Device,” IEEE Electron Device Lett., vol. 22, No. 11, (Nov. 2001) pp. 556-558, Copyright 2001 IEEE.
B. Eitan et al., “Spatial Characterization of Hot Carriers Injected into the Gate Dielectric Stack of a MOFSET Based on Non-Volatile Memory Device,” date unknown, pp. 58-60.
B. Eitan et al., “NROM: A Novel Localized Trapping, 2-Bit Nonvolatile Memory Cell,” IEEE Electron Device Lett, vol. 21, No. 11, (Nov. 2000), pp. 543-545, Copyright 2000 IEEE.
E. Maayan et al., “A 512Mb NROM Flash Data Storage Memory with 8MB/s Data Range,” Dig. IEEE Int. Solid-State Circuits Conf., San Francisco, (Feb. 2002), pp. 1-8, Copyright Saifun Semiconductors Ltd. 2002.
E. Maayan et al., “A 512Mb NROM Flash Data Storage Memory with 8MB/s Data Range,” ISSCC 2002 Visuals Supplement, Session 6, SRAM and Non-Volatile Memories, 6.1 and 6.2, pp. 76-77, 407-408. Copyright 1990 IEEE.
M. Janai, “Data Retention, Endurance and Acceleration Factors of NROM Devices,” IEEE 41stAnnual International Reliability Physics Symposium, Dallas, TX (2003), pp. 502-505, Copyright 1989 IEEE.
S. Minami and Y. Kamigaki, “A Novel MONOS Nonvolatile Memory Device Ensuring 10-Year Data Retention after 107Erase/Write Cycles,” IEEE Transactions on Electron Devices, vol. 40, No. 11 (Nov. 1993) pp. 2011-2017, Copyright 1998 IEEE.
C. Pan, K. Wu, P. Freiberger, A. Chatterjee, G. Sery, “A Scaling Methodology for Oxide-Nitride-Oxide Interpoly Dielectric for EPROM Applications,” IEEE Transactions on Electron Devices, vol. 37, No. 6, (Jun. 1990), pp. 1439-1443, Copyright 1990 IEEE.
P. Manos and C. Hart, “A Self-Aligned EPROM Structure with Superior Data Retention,” IEEE Electron Device Letters, vol. 11, No. 7, (Jul. 1990) pp. 309-311, Copyright 1990 IEEE.
W. Owen and W. Tchon, “E2PROM Product Issues and Technology Trends,” IEEE 1989, pp. 17-19, Copyright 1989 IEEE.
T. Huang, F. Jong, T. Chao, H. Lin, L. Leu, K. Young, C. Lin, K. Chiu, “Improving Radiation Hardness of EEPROM/Flash Cell BY N2O Annealing,” IEEE Electron Device Letters, vol. 19, No. 7 (Jul. 1998), pp. 256-258, Copyright 1998 IEEE.
B. Eitan et al., “Electrons Retention Model for Localized Charge in Oxide-Nitride-Oxide (ONO) Dielectric,” IEEE Device Lett., vol. 23, No. 9, (Sep. 2002), pp. 556-558. Copyright 2002 IEEE.
T. Nozaki, T. Tanaka, Y. Kijiya, E. Kinoshita, T. Tsuchiya, Y. Hayashi, “A 1-Mb EEPROM with MONOS Memory Cell for Semiconductor Disk Application,” IEEE Journal of Solid-State Circuits, vol. 26, No. 4 (Apr. 1991), pp. 497-501, Copyright 1991 IEEE.
F. Vollebregt, R. Cuppens, F. Druyts, G. Lemmen, F. Verberne, J. Solo, “A New E(E)PROM Technology With A TiSi2Control Gate,” IEEE 1989, pp. 25.8-1 -25.8.4, Copyright 1989 IEEE.
B. Eitan et al., “Impact of Programming Charge Distribution on Threshold Voltage and Subthreshold Slope of NROM Memory cells,” IEEE Transactions on Electron Devices, vol. 49, No. 11, (Nov. 2002), pp. 1939-1946, Copyright 2002 IEEE.
B. Eitan et al., “Spatial characterization of Channel hot electron injection utilizing subthreshold slope of the localized charge storage NROM™ memor
No affiliations
Auduong Gene
Leffert Jay & Polglaze P.A.
LandOfFree
Vertical NROM having a storage density of 1 bit per 1F2 does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Vertical NROM having a storage density of 1 bit per 1F2, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Vertical NROM having a storage density of 1 bit per 1F2 will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3475404