Patent
1991-06-12
1992-06-30
Prenty, Mark
357 2314, 357 235, H01L 2910, H01L 2978, H01L 2968
Patent
active
051268078
ABSTRACT:
A vertical MOS transistor comprises a semiconductor substrate, a first impurity region defined on the surface of the semiconductor substrate, a second impurity region defined under the first impurity region, the conduction type of the second impurity region being opposite to that of the first impurity region, a trench engraved on the surface of the semiconductor substrate to cut through the first and second impurity regions deeper than at least the bottom of the second impurity region, and a gate electrode disposed in the trench with a gate insulation film interposing between the wall of the trench and the gate electrode. THE gate insulation film is thicker on the bottom of the trench and on part of the side walls of the trench continuous to the bottom than on the other parts.
REFERENCES:
patent: 4914058 (1990-04-01), Blanchard
patent: 5034787 (1991-07-01), Dhong et al.
Baba Yoshiro
Hiraki Shun-ichi
Osawa Akihiko
Yanagiya Satoshi
Kabushiki Kaisha Toshiba
Prenty Mark
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