Vertical junction field effect transistors having sloped...

Active solid-state devices (e.g. – transistors – solid-state diode – Specified wide band gap semiconductor material other than... – Diamond or silicon carbide

Reexamination Certificate

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C257S134000, C257S136000, C257S256000, C257S272000, C257S286000, C257S287000, C257S328000, C257S330000, C257SE27148, C257SE29313, C257SE29314, C257SE31073, C438S137000, C438S138000, C438S156000, C438S192000, C438S212000, C438S268000

Reexamination Certificate

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08058655

ABSTRACT:
Semiconductor devices and methods of making the devices are described. The devices can be junction field-effect transistors (JFETs). The devices have raised regions with sloped sidewalls which taper inward. The sidewalls can form an angle of 5° or more from vertical to the substrate surface. The devices can have dual-sloped sidewalls in which a lower portion of the sidewalls forms an angle of 5° or more from vertical and an upper portion of the sidewalls forms an angle of <5° from vertical. The devices can be made using normal (i.e., 0°) or near normal incident ion implantation. The devices have relatively uniform sidewall doping and can be made without angled implantation.

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patent: 2009/0278137 (2009-11-01), Sheridan et al.
patent: 2009/0278177 (2009-11-01), Sankin et al.

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