Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
1999-06-09
2001-06-26
Crane, Sara (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C438S467000
Reexamination Certificate
active
06252292
ABSTRACT:
FIELD OF THE INVENTION
The invention relates to fuses for semiconductor devices.
BACKGROUND OF THE INVENTION
Fuses are included in semiconductor devices as in many electrical devices to help protect the devices from excessive levels of electrical current and thereby prevent damage to the devices. For example, metal fuses may be included in integrated circuits to reroute circuit features during and after wafer manufacturing processes. Some fuses are laser blown. With a laser blown fuse, laser power and spot location must be carefully controlled to minimize damage to adjacent fuses and to the underlayer structures including the semiconductor substrate.
In modern microelectronics, often, a rather large number of fuses must be incorporated into a rather small space to protect an increasingly large number of densely packed devices. For example, as memory capacity increases memory devices having similar or reduced size, the number of fuses increases.
According to one example, in currently utilized DRAM device design, the fuses typically consume an area of about 3% to about 5% of the total chip area. As device sizes continue to shrink, future generations of memory chips may be negatively impacted by the amount of area necessary for fuse structures. According to estimations, some DRAM devices may require on the order of 30,000 to 160,000 fuses.
This problem may be compounded by an increase and a need for redundancy. Accordingly, ways are being sought out to increase fuse density. One way of accomplishing an increase in fuse density is by reducing fuse pitch.
Another problem associated with fuse design is the need for providing a cavity adjacent to the fuses to provide a free volume for material displacement during fuse blowing. The free volume may also serve to limit interlevel dielectric crack propagation damage to adjacent structures.
As fuse density increases, the risk of damage to adjacent fuses may also increase.
SUMMARY OF THE INVENTION
To provide a solution to the above and other problems, among other things, the present invention provides a fuse structure and a process for forming the fuse structure that greatly reduces the area consumed by the fuse.
In accordance with these and other objects and advantages, aspects of the present invention provide a vertically arranged fuse structure for a semiconductor chip. The fuse structure includes a fuse stud vertically arranged with respect to a major plane of the semiconductor chip. The fuse stud is arranged adjacent and electrically connected to overlying electrically conducting material and underlying electrically conducting material. A fuse void is arranged in the vertically arranged fuse stud. In an unblown state, the fuse provides electrical connection between the overlying electrically conducting material and the underlying electrically conducting material. The electrical connection provided by the fuse is breakable by passing electrical energy of a predetermined level through the fuse.
Other aspects of the present invention provide a method forming a fuse structure on a semiconductor substrate. The method includes depositing a first layer of dielectric material. The first layer of dielectric material is etched down to underlying electrically conducting material to form a fuse stud cavity vertically oriented with respect to the major plane of the semiconductor substrate. An electrically conducting material is deposited in the fuse stud cavity to form a fuse stud, wherein a void is formed in the electrically conducting material as it is deposited.
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described only the preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized, the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the drawings and description are to be regarded as illustrative in nature and not as restrictive.
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Brintzinger Axel C.
Iggulden Roy
Weber Stefan J.
Weigand Peter
Capella Steven
Connolly Bove Lodge & Hutz
Crane Sara
International Business Machines - Corporation
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