Vertical DRAM cell and method

Static information storage and retrieval – Magnetic bubbles – Guide structure

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357 41, 357 45, 357 51, 357 55, 357 59, 365149, H01L 2978, H01L 2702, H01L 2906

Patent

active

046739629

ABSTRACT:
DRAM cells and arrays of cells on a semiconductor substrate, together with methods of fabrication, are disclosed wherein the cells are formed in pairs or quartets by excavating a trench or two trenches through the cell elements to split an original cell into two or four cells during the fabrication. The cells include vertical field effect transistors and capacitors along the trench sidewalls with word lines and bit lines crossing over the cells.

REFERENCES:
patent: 4199772 (1980-04-01), Natori et al.
D. M. Kenney, "V-Groove Dynamic Memory Cell", IBM Technical Disclosure Bulletin, vol. 23 (1980), pp. 967-969.
T. S. Chang et al., "Fabrication of V-MOS or U-MOS Random Access Memory Cells with Self-Aligned Word Line", IBM Technical Disclosure Bulletin, vol. 22 (1979), pp. 2768-2771.

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