Vertical deflection control circuit and television receiver usin

Details Vertical deflection control circuit and television receiver usin Vertical deflection control circuit and television receiver usin

1996-03-11

1998-06-09

Grant, Christopher C.

Television

Synchronization

Automatic phase or frequency control

348447, H04N 504

Patent

active

057643032

ABSTRACT:
A vertical deflection control circuit includes a double-speed counter (18) for counting a clock with a frequency of 2f.sub.H, f.sub.H representing a horizontal frequency of an inputted video signal, in synchronism with a vertical sync signal, timing generating means (20) for judging even-field/odd-field of the input video signal and generating a timing signal based on a judged result, and offset signal adding circuitry (28) for adding an offset value to an output of the double-speed counter (18) at a timing of the timing signal, thereby a video signal in a vertical deflection system can be double-scanning-converted with a simple arrangement.

REFERENCES:
patent: 4672446 (1987-06-01), Ikeda et al.
patent: 4680632 (1987-07-01), Willis et al.
patent: 5473223 (1995-12-01), Murakami

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