Vertical conduction MOS controlled thyristor with increased IGBT

Active solid-state devices (e.g. – transistors – solid-state diode – Regenerative type switching device – With extended latchup current level

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257138, 257151, 257152, 257153, H01L 2974, H01L 31111

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active

058442596

ABSTRACT:
An MCT is formed as a four-layer device, using alternating cells of: (a) P diffusions in an N.sup.- wafer having lower N.sup.+ and P.sup.+ layers with N.sup.+ cathode regions in the P diffusions, and (b) shallow P.sup.+ diverter cells. A cathode electrode is connected to the N.sup.+ cathodes, but not to the P diffusions containing the N.sup.+ cathode regions. The alternating cells are arranged in checkerboard fashion with the cells of any given row having a narrow spacing to define a narrow turn-off channel and the rows being more widely spaced to define a conduction channel having a reduced inherent JFET resistance.

REFERENCES:
patent: 5243201 (1993-09-01), Bauer
patent: 5260590 (1993-11-01), Temple
patent: 5281833 (1994-01-01), Ueno
patent: 5381025 (1995-01-01), Zommer
V.A.K. Temple, "MOS-Controlled Thyristors (MCTs)", International Electron Devices Meeting (IEDM) Technical Digest, pp. 282-285, San Francisco, Dec. 1984.
K.K. Afridi and J.G. Kassakian, "Turn-Off Failures in Individual and Paralleled MCTs", Proceedings of the ISPSD, pp. 60-65, 1993.
H. Lendenmann et al., "Approaching homogeneous switching of MCT devices: Experiment and Simulation", Proceedings of the ISPSD, pp. 66-70, 1993.
M. Nandakumar, et al., "The Base-Resistance-Controlled Thyristor (BRT): A New MOS-Gated Power Thyristor".
V.A.K. Temple et al, "Preview of Second Generation P-MCT", Proceedings of the PCIM, pp. 161-167, Sep. 1994.

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