Vertical chip mount memory package with packaging substrate and

Details Vertical chip mount memory package with packaging substrate and Vertical chip mount memory package with packaging substrate and

1993-08-19

1994-11-08

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

For plural devices

257690, 257691, 257777, H01L 23498, H01L 23538

Patent

active

053629868

ABSTRACT:
A packaging substrate (10) is populated with memory chip cube(s) (40) and horizontally mounted interconnect chip(s) (19)mounted on the substrate which are joined during assembly using two kinds of lead tin solder alloys to form the memory chip cube. One is a high melting point lead tin alloy (HMA), another is a lower melting point lead tin alloy (LMA). The memory chip pairs (11) of the memory cube are formed by placing functional memory chips over other functional memory chips before they were diced. The chip pads of the individual memory chips and the lead tin pads of the memory chips within the wafer are aligned and the high melting point lead tin solder is reflowed, forming memory chip pairs.

REFERENCES:
patent: 4801992 (1989-01-01), Golubic
patent: 4855809 (1989-08-01), Malhi et al.
patent: 4922378 (1990-05-01), Malhi et al.
patent: 5031072 (1991-07-01), Malhi et al.
patent: 5057909 (1991-10-01), Mok et al.
Kolankowsky et al., Silicon Memory Cube, IBMTDB, vol. 18, No. 10, Mar. 1976, pp. 3239-3242.
"Vertical Chip Packaging", R. A. Henle, IBM Technical Disclosure Bulletin, vol. 20, No. 11A, pp. 4339-4340, Apr. 1978.

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