Vertical cavity surface emitting laser (VCSEL) driver with...

Coherent light generators – Particular component circuitry – For driving or controlling laser

Reexamination Certificate

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Reexamination Certificate

active

06532245

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to the field of laser driver circuits, and in particular, to a laser driver for vertical cavity surface emitting laser (VCSEL) arrays.
2. Background Information
A laser device called a VCSEL (Vertical Cavity Surface Emitting Laser) is known. Simply put, a VCSEL is a semiconductor laser made of many layers, e.g., 600, which emits light vertically from a lower surface and in a direction parallel to the direction of its optical cavity, as opposed to an edge-emitting type laser structure. VCSEL's have advantages over edge-emitting type structures because, for example, the edge-emitting type lasers must be precisely broken or cleaved individually to form each device during manufacturing. However, with VCSEL's, literally millions of laser devices can be made simultaneously in an etching process.
VCSEL's are currently some of the smallest lasers being produced. There is a relatively new type of VCSEL in development, the QD-VCSEL. The ‘QD’ signifies the Quantum Dots which are used in the active layer of this type of VCSEL. The QD-VCSEL promises to achieve even further size reductions.
VCSEL's have a range of uses. For example, a specially designed VCSEL has been used to create an optical latch or optical state memory, the VCSEL transitioning and latching in the ON state when an optical input is received. Arrays of such VCSEL's open up possibilities for various massively parallel optical computing applications such as pattern recognition. VCSEL's have data communications applications as well as would be clear to one skilled in the art, for example, as transmitters in parallel optical links. For more information about VCSEL's, see, for example, “LASERS, Harnessing the Atom's Light,” Harbison et al., Scientific American Library, 1998, pages 169-177.
VCSEL arrays are commonly manufactured in a common cathode configuration, i.e., with all the laser cathodes connected together. A graph representing the optical power output P
O
in milliwatts (mW) vs. the current input I in milliamps (mA) for a typical VCSEL is shown in FIG.
1
. The VCSEL does not begin lasing until the current through it exceeds a certain laser threshold value, shown as I
th
in the figure. The slope of the curve above I
th
is commonly referred to in the art as the differential quantum efficiency (DQE) of the VCSEL.
The values of both I
th
and DQE are process dependent, that is, they are dependent on manufacturing process variations which are, at present, not completely controllable or predictable. Therefore, a method to adjust the current through the VCSEL to compensate for these variations is required.
A method is known to electrically drive a common cathode array as shown in FIG.
2
. See, for example, U.S. Pat. No. 4,709,370, Bednarz et al., Nov. 24, 1987.
In particular, Bednarz et al. (U.S. Pat. No. 4,709,370) discloses (Abstract) a driver for driving the anode of a laser diode which includes a constant-current differential switch comprising NPN transistors. Two sources supply constant current into the node where the differential switch drives the laser diode: one source supplies bias current through the laser diode; the second provides a current substantially equal to the constant current through the differential switch. When the transistor, which drives the laser diode, is turned on by a modulating signal applied to its base electrode, the current from the second source flows through it into the current source at the common emitter junction. When this transistor is turned off, the current from the second source flows through the laser diode, adding to the bias current therethrough. Under these circumstances, the total current through the laser diode exceeds the threshold for lasing action and the laser diode is turned on.
Battjes (U.S. Pat. No. 3,633,120) discloses (Abstract) an amplifier circuit for increasing current gain at high frequencies which includes first and second pairs of transistors, wherein the outputs of the transistor pairs are coupled in parallel while a common input current is provided in series to the four transistors. The circuit substantially doubles the current gain achieved at certain high frequencies. This circuit is referred to herein as an f
T
doubler.
Returning to the
FIG. 2
circuitry, the variable current source I
1
supplies a DC current equal to the I
th
(threshold) current of the VCSEL. Variable current source I
2
supplies a DC current equal to the desired modulation current. Variable current source I
3
supplies a DC current equal to the current of I
2
. When signal A
0
is high and signal A
1
is low, current from current source I
3
is directed through Q
0
. Since the current from current source I
3
is equal to the current from current source I
2
, only the threshold current from current source I
1
will be flowing in the VCSEL at this time.
When signal A
0
is low and signal A
1
is high, the current from current source I
3
is directed through Q
1
. Therefore, a current equal to the sum of the current from current sources I
1
and I
2
will be flowing in the VCSEL.
In reality, it is desired that the collector current of Q
0
equal the current of I
2
. Mismatches between I
2
and I
3
, and the base current of Q
0
, cause the collector current of Q
0
to not equal I
2
. The base current ‘steals’ some of the I
3
current, since I
3
is the emitter current, and the collector current is the emitter current less the base current.
However, a mismatch between current sources I
2
and I
3
would cause the respective currents to be unequal and lead to problems. Some causes for current source mismatch include process variations/tolerances, V
be
(voltage base to emitter) mismatches in bipolar transistor devices, and V
T
(threshold voltage) in field effect transistor devices
If the current from current source I
3
is greater than the current from current source I
2
, when Q
0
is on and Q
1
is off, some of I
1
will be diverted away from the VCSEL and through Q
0
, so that less current will flow through the VCSEL. This causes the low level current flowing in the VCSEL to fall below the threshold current I
th
. This will cause a turn on delay, since the VCSEL is not at I
th
when the turn on signal is first applied. The turn on delay results in what is referred to as ‘duty cycle distortion’ in the optical output waveform from the VCSEL, and is a potential source of skew, i.e., a timing misalignment, between channels in a multi-channel system with a VCSEL array.
On the other hand, if the current from current source I
3
is less than the current from current source I
2
, a current flows through the VCSEL greater than I
th
when Q
0
is on. In this case, the average optical power out of the VCSEL will increase beyond desired levels, possibly causing an over-powering condition. The effect is that a current (I
1
+(I
2
−I
3
) greater than the laser threshold current flows through the laser when it is supposed to be at the threshold.
Therefore, to provide a way to compensate for these possible problems, the current source I
3
should be adjustable independent of current source I
2
.
A common implementation of current source I
3
is shown in schematic form in FIG.
3
. It includes a reference current source Iref and a current mirror including transistors Q
2
and Q
3
. Current Iref controls current lout from Q
3
by the connection with Q
2
. (Note that in the circuits depicted herein, the current is drawn according to so-called ‘conventional current’.)
Typically, VCSEL's have DQE's in the range of 0.1 mW/mA to 0.6 mW/mA. This causes a 6 to 1 ratio in modulation current necessary in current sources I
2
and I
3
, since the DQE is directly proportional to the modulation current through the laser provided by the current sources I
2
and I
3
(recall that the slope of the current curve above I
th
is the differential quantum efficiency ‘DQE’).
To handle the large current necessary with a low DQE to obtain the needed output power, transistor Q
3
of current sou

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