Vertical bipolar transistor with recessed epitaxially grown intr

Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure – With enlarged emitter area

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257583, 257584, 257586, 257588, 257591, H01L 2972, H01L 2906

Patent

active

052352064

ABSTRACT:
A method of manufacturing a vertical bipolar transistor including the steps of: providing a semiconductor substrate including a first region of a first conductivity type; forming an extrinsic base region of a second conductivity type in the surface of the first region, the extrinsic base region generally bounding a portion of the first region; forming by ion implantation a linking region of the second conductivity type in the surface of the bounded portion of the first region so as to electrically link generally opposing edges of the extrinsic base region through the linking region; forming an insulating spacer over the junction between the extrinsic base region and the linking region so as to generally bound a portion of the linking region within the portion of the first region; etching the surface of the bounded portion of the linking region a short distance into the linking region; forming by epitaxial growth a first layer of semiconductor material of the second conductivity type on the etched surface of the bounded portion of the linking region; heating the semiconductor substrate to form an intrinsic base region at least partially within the first layer and to form an electrical connection between the intrinsic and extrinsic base regions through the linking region; and forming a second region of the first conductivity type in the surface of the intrinsic base region.

REFERENCES:
patent: 4824799 (1989-04-01), Komatsu
patent: 5077227 (1991-12-01), Kameyama et al.
patent: 5109262 (1992-04-01), Kadota et al.
patent: 5118634 (1992-06-01), Neudeck et al.
patent: 5121184 (1992-06-01), Huang et al.
patent: 5132765 (1992-07-01), Blouse et al.

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