Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2006-10-10
2006-10-10
Flynn, Nathan J. (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257SE23067, C257SE23145, C257SE21577, C257S296000
Reexamination Certificate
active
07119444
ABSTRACT:
The present invention provides a system for dissipating any aberrant charge that may accumulate during the fabrication of a semiconductor device segment (200), obviating overstress or break down damage to a focal device structure (208) that might result from uncontrolled dissipation of the aberrant charge. A substrate (202) has first and second intermediate structures (204, 206) disposed atop the substrate, with the focal structure disposed atop the substrate therebetween. A first conductive structure (210) is disposed atop the second intermediate structure, the focal structure, and a portion of the first intermediate structure. A third intermediate structure (214) is disposed contiguously atop the first conductive structure and the first intermediate layer. A void (216) is formed in a peripheral region (218) of device segment, through the first and third intermediate layers down to the substrate. A second conductive structure (220) is disposed atop the third intermediate structure such that it couples the substrate through the void.
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Imam Zafar
Sucher Bradley
Tian Weidong
Brady III W. James
McLarty Peter K.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Tran Tan
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