Versatile microprocessor bus interface

Details Versatile microprocessor bus interface Versatile microprocessor bus interface

1979-11-13

1981-09-01

Shaw, Gareth D.

Boots, shoes, and leggings

364900, G06F 1300

Patent

active

042875633

ABSTRACT:
There is provided a microprocessor interface circuitry which allows single peripheral and memory devices to be used with at least two different types of microprocessors. The interface includes a latch which latches the state of a control signal provided to the peripheral/memory device by the microprocessor. The control signal that is latched serves a somewhat different function when eminating from each of the at least two different microprocessors, and as such has different logic states. Logic circuitry is controlled by the latch to take at least one other control signal and generate the internal control signals used by the peripheral/memory device.

REFERENCES:
patent: 4057846 (1977-11-01), Cockerill et al.
patent: 4067059 (1978-01-01), Derchak
patent: 4103329 (1978-07-01), Davis
patent: 4110830 (1978-08-01), Krygowski
patent: 4136400 (1979-01-01), Caswell et al.
patent: 4167782 (1979-09-01), Joyce et al.
patent: 4171536 (1979-10-01), Phillip et al.

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