Versatile interconnection bus

Details Versatile interconnection bus Versatile interconnection bus

1986-08-21

1988-03-29

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

3408255, H04J 302

Patent

active

047349093

ABSTRACT:
A bus arbitration system comprising a plurality of bus lines and a clock which produces first and second phrases in which a drive generates a first logic state during the first phase to precharge the capacitance associated with the bus lines and generates either first or second logic state during the second phase. Also, a bus interface is described in which different types of information are transmitted during different phases.

REFERENCES:
patent: 4387425 (1983-06-01), El-Gohary
patent: 4412326 (1983-10-01), Limb
patent: 4451881 (1984-05-01), Grice et al.
patent: 4494113 (1985-01-01), Yamaoka et al.
patent: 4519028 (1985-05-01), Olsen et al.
patent: 4584679 (1986-04-01), Livingston et al.
patent: 4628502 (1986-12-01), Boulard et al.
patent: 4656627 (1987-04-01), Hasley et al.

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