Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation
Reexamination Certificate
2006-12-26
2006-12-26
Mis, David (Department: 2817)
Oscillators
Automatic frequency stabilization using a phase or frequency...
Tuning compensation
C331S018000, C331S025000, C331SDIG002
Reexamination Certificate
active
07154344
ABSTRACT:
A phase locked loop (PLL) circuit comprising: feedback division circuitry for receiving an output signal, the feedback division circuitry arranged to divide the output signal by a first division factor in a first mode of operation, and a second division factor in a second mode of operation.
REFERENCES:
patent: 5610955 (1997-03-01), Bland
patent: 6553057 (2003-04-01), Sha et al.
patent: 6700446 (2004-03-01), Ke
patent: 6744323 (2004-06-01), Moyal et al.
Yiwu Tang et al.: “A low-noise fast-settling PLL with extended loop bandwidth enhancement by new adaptation technique”, Proceedings 14th Annual IEEE International ASIC/SOC Conference (IEEE Cat. No. 01TH8558), Arlington, VA, USA, Sep. 12, 2001,-Sep. 15, 2001, pp. 93-97, XP002272697.
Yiwu Tang et al.: “A new fast-settling gearshift adaptive PLL to extend loop bandwidth enhancement in frequency synthesizers”, 2002 IEEE International Symposium on Circuits and Systems, Porceedings (Cat. No. 02CH37353), Phoenix, AZ, USA, vol. 4, May 26, 2002,-May 29, 2002, pp. 787-790, XP002272698.
Lawley Chris
Thies William
Mis David
STMicroelectronics Limited
LandOfFree
Versatile feedback system for phase locked loop architecture does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Versatile feedback system for phase locked loop architecture, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Versatile feedback system for phase locked loop architecture will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3671275