Metal fusion bonding – Solder form
Patent
1989-11-30
1991-06-11
Heinrich, Sam
Metal fusion bonding
Solder form
228 565, 228254, 29834, 437209, 357 65, H05K 334
Patent
active
050225804
DESCRIPTION:
BRIEF SUMMARY
This invention relates to a flip-chip solder bond arrangement having means for determining the alignment of the components thereof.
Flip chip solder bonding is now attracting significant attention as a means of providing very high density area interconnections between a chip and a substrate, as a bonding technique with very attractive electrical characteristics (low inductance and capacitance) for high speed electronic devices and as a method of acheiving very precise alignment and separation of components for micro-optical or related applications.
As illustrated schematically in FIG. 1, in a flip-chip solder bonding, it is usually necessary to provide an integrated circuit chip 2 and a substrate component 4 (which may itself be a chip) each of which comprises a substrate having on one surface thereof a mating array of solderable metallisation pads 6, 8 typically using CrCuAu multilayer metallisation), and either or both of which are provided with solder bumps 10 over the solderable pads (typically using 95Pb:5Sn or 63Sn:37Pb solders (wt%)). This basic structure is well known. To bond the two components, the components 2, 4 are first aligned to within the accuracy required for the solder bumps 10 to contact the corresponding wettable pad 8 or bumps (.about.1/2 a pad diameter). The assembly is then raised above the melting point of the solder involved under inert or reducing conditions. The solder wets the wettable metallisation and surface tension forces then act to pull the two components into very accurate final alignment. The bonded assembly is then cooled to form a solidly bonded hybrid device structure. The final, equilibrium bond shape and spacing of the two components is controlled by the balance of surface tension and gravitational forces at the bonding temperature, and can readily be calculated for a regular array of circular bonds, knowing the individual solder bump volumes, wettable pad sizes, chip mass and solder surface tension. For large bond arrays with circular wettable pads and for low chip masses, the final solder bond geometry is that of a doubly truncated sphere, making calculation particularly straightforward. The processes of bonding and the forces acting at the bonding temperature are illustrated schematically in FIGS. 2 and 3. It should be noted that the solder to form the bumps may be applied over areas larger than that of the wettable metallisation, using a variety of masking techniques, to provide a controlled `dewet` ratio and allow independent control of solder bump heights from a uniform solder coating thickness, as illustrated in FIG. 4.
Having produced a flip chip solder bonded hybrid device, it is then of interest to determine whether that hybrid device has been successfully bonded. The very nature of the flip chip bonded device, with its face-to-face bonded configuration, makes conventional visual or optical microscopy inspection difficult, even where an optically transparent chip is involved since the wettable metallisation itself obscures the major area of the bond.
The major criterion for successful bonding of microelectronic devices is that an ohmic electrical connection has been acheived at every bond site, whereas, for the micro-optical devices, the criterion of success is that the two components have become aligned to the required accuracy. While the direct checking of the bond electrical characteristics can usually only easily be accomplished by a functional electrical assessment. A method that provides quantitative information on the success of the solder wetting and surface tension self alignment processes during the bonding operation must provide a very high degree of confidence that the bonding process itself has been successful. Such a method, coupled with bump height and height uniformity measurements prior to assembly and other related checks (for example monitoring the ohmic nature of the wettable metal to silicon input pad connection), then provides the basis of a viable inspection procedure for monitoring production of flip chip bonded devices. In the cas
REFERENCES:
patent: 3811186 (1974-05-01), Larnerd et al.
patent: 4878611 (1989-11-01), LoVasco et al.
IBM Technical Disclosure Bulletin, "Split Field Alignment Marks", vol. 18, No. 10, p. 3306, Mar. 1976.
Micro Electronic Engineering, vol. 6, No. 1-4, R. Patovan et al., "Alignment Markers . . . ", pp. 117-122, Dec. 1987.
Heinrich Sam
Plessey Overseas Limited
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