Vernier delay circuit

Details Vernier delay circuit Vernier delay circuit

2009-03-02

2010-11-09

Nguyen, Hai L (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

C327S261000, C327S284000

Reexamination Certificate

active

07830191

ABSTRACT:
A ring oscillator oscillates at a frequency determined by an input bias signal. A bias signal adjusting unit produces a bias signal for the ring oscillator using feedback so that the oscillation frequency of the ring oscillator matches a predetermined reference frequency. An individual bias circuit includes a plurality of bias circuits provided for a total of N second variable delay elements, respectively. The bias circuits are configured such that the bias signals can be individually adjusted.

REFERENCES:
patent: 4494021 (1985-01-01), Bell et al.
patent: 5684421 (1997-11-01), Chapman et al.
patent: 6819157 (2004-11-01), Cao et al.
patent: 7015740 (2006-03-01), Feinberg et al.
patent: 7411436 (2008-08-01), Fang et al.
patent: 7535273 (2009-05-01), Suda
patent: WO 03/036796 (2003-01-01), None

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