Verification system for simulator

Details Verification system for simulator Verification system for simulator

1998-09-14

2000-06-20

Teska, Kevin J.

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Circuit simulation

709300, 39550006, G06F 1100, G06F 944

Patent

active

060773049

ABSTRACT:
An electronic circuit verification system and method includes an HDL circuit simulator and a circuit simulation verifier that pass control back and forth between each other, and that cooperate so as to perform circuit verification tasks than would be very difficult to perform using only the HDL circuit simulator. The circuit simulation verifier executes a test bench so as to define operational correctness and/or performance criteria, including at least one Expect Event, each Expect Event comprising a combination of one or more signal values that are expected to occur during simulation, and a time frame during which the signal value combination is expected to occur. The circuit simulation verifier includes instructions for blocking execution of a thread of execution associated with the test bench until the earlier of the combination of one or more signal values occurring during simulation and the time frame expiring.

REFERENCES:
patent: 5163016 (1992-11-01), Har'El et al.
patent: 5812416 (1998-09-01), Gupte et al.
patent: 5841967 (1998-11-01), Sample et al.
patent: 5905883 (1999-05-01), Kasuya

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