Verification method by means of comparing internal state traces

Details Verification method by means of comparing internal state traces Verification method by means of comparing internal state traces

1998-12-29

2001-09-04

Gordon, Paul P. (Department: 2121)

Data processing: generic control systems or specific application

Specific application, apparatus or process

Product assembly or manufacturing

C716S030000, C713S002000

Reexamination Certificate

active

06285914

ABSTRACT:

FIELD OF THE INVENTION
The Present invention relates to function verification of chip models such as models designed about microprogram control units or microprocessors, in a design stage, or a packaging test of an actual chip embodiment; and, more particularly, to a chip verification method by means of comparing internal state traces of chips.
DESCRIPTION OF THE PRIOR ART
In a conventional function verification method for design and function verification of chips such as microprogram control units (hereinafter, referred to as ‘MCU’) having complicated functions, etc., a simulation is executed by applying a test vector to a designed MCU model. Such a method may be performed as shown in
FIG. 1
in such a way that a virtual system provided by modeling a system containing an MCU model through use of a hardware description language (hereinafter, referred to as ‘HDL’) is simulated, and that a predicated final result and a simulated final result are compared.
However, such a conventional verification method requires considerable time for its verification since the comparison can be fulfilled only after completion of all simulations. A method for adding a comparison process in the midst of the simulation has been proposed to overcome such a problem, but such an approach makes it difficult to ensure exact comparison data.
SUMMARY OF THE INVENTION
It is, therefore, a primary object of the invention to provide a chip verification method by means of comparing internal state traces of chips, in which overall designing time of chips having various functions can be reduced and a more exact verification of the chips can be executed.
In accordance with the present invention for achieving the above object, a chip verification method by means of comparing internal state traces of chips is provided. The method, in a chip design stage, includes a first step of executing an application program for each of a target system having a target chip and a system having a function verification chip model of a design stage, by using a virtual system modeled by a hardware description language; a second step of storing an internal state of the target chip on a command-by-command basis during performance of the application program executed in the first step and generating a trace file; a third step of comparing the internal state of the target chip stored in the trace file and an internal state of the chip model to be functionally verified, on a command-by-command basis; and a fourth step of continuing execution of the program if the respective internal states are determined, from the above comparison result, to be the same and if different, outputting the internal state and ending execution of the program.
In the present invention for attaining the above object, the chip verification method, in a chip packaging test stage, includes a first step of executing an application program for each of a first target system having a target chip and a second target system having a packaging test chip; a second step of storing an internal state of the target chip on a command-by-command basis during performance of the application program executed in the first step and generating a trace file; a third step of comparing the internal state of the target chip stored in the trace file with an internal state of the packaging test chip on a command-by-command basis; and a fourth step of continuing execution of the program if the respective internal states are determined, from the above comparison result, to be the same and if different, outputting the internal state and ending execution of the program.


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