Verification method and system for logic circuit

Details Verification method and system for logic circuit Verification method and system for logic circuit

2008-07-01

2008-07-01

Phan, Thai (Department: 2128)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Event-driven

C703S015000, C703S021000, C716S030000, C714S028000

Reexamination Certificate

active

07395197

ABSTRACT:
A shared register row is provided between a program-based circuit simulator and a device-based circuit simulator. The shared register row includes a plurality of shared registers each corresponding to signals transmitted between the program-based and device-based circuit simulators. By mutually accessing a shared register corresponding to a signal from the program-based and device-based circuit simulators, the signal is transferred via the corresponding shared register with synchronization between the program-based and device-based circuit simulators.

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M. Kudlugi et al., “A Transaction-Based Unified Simulation/Emulation Architecture for Functional Verification,” IEEE Design Automation Conference, 2001, pp. 623-628.

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