Vectorization in a SIMdD DSP architecture

Details Vectorization in a SIMdD DSP architecture Vectorization in a SIMdD DSP architecture

2007-12-25

2007-12-25

Steelman, Mary (Department: 2191)

Data processing: software development, installation, and managem

Software program development tool

Translation of code

C717S140000, C717S149000, C717S160000, C712S010000, C712S022000, C712S009000

Reexamination Certificate

active

10695970

ABSTRACT:
A method for determining vectorization configurations in a computer processor architecture, the method including identifying a vectorizable loop in a computer program, identifying a memory access pattern of data required for implementing the loop in the architecture, computing a set of candidate configurations of resources required for vectorizing the data in the architecture, where the computing step includes configuring a vector pointer register of the architecture in support of either of reorder-on-read use and reorder-on-write use of a vector element file of the architecture, selecting one of the candidates in accordance with predefined selection criteria, and implementing the selected vectorization configuration in the architecture.

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