Vector register system for executing plural read/write commands

Details Vector register system for executing plural read/write commands Vector register system for executing plural read/write commands

1987-08-31

1990-12-25

Williams, Jr., Archie E.

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36423221, 3642419, 3642436, 3642461, 3642464, 364259, 364263, 3642701, 364271, 3642714, 3642715, 3642716, G06F 15347, G06F 1204, G06F 928, G06F 938

Patent

active

049808176

ABSTRACT:
A vector register provides the capability for simultaneously writing through at least two write ports and simultaneously reading from at least two read ports. In addition, a barber pole technique for storing words from logical vector registers into banks is provided to minimize conflicts.

REFERENCES:
patent: 4128880 (1978-12-01), Cray, Jr.
patent: 4435765 (1984-03-01), Uchida et al.
patent: 4490786 (1984-12-01), Nakatani
patent: 4617625 (1986-10-01), Nagashima
patent: 4636942 (1987-01-01), Chen et al.
patent: 4661900 (1987-04-01), Chen et al.
patent: 4665479 (1987-05-01), Oinaga
patent: 4680730 (1987-07-01), Omoda et al.
patent: 4783732 (1988-11-01), Morton
IBM System/370 Vector Operations Manual First Edition, Publication No. SA22-7125-0, Jan. 1986.
CRAY-2 Computer System Functional Description Publication No. HR-2000, CRAY Research, Inc., May 1985.

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