Vector register file with arbitrary vector addressing

Details Vector register file with arbitrary vector addressing Vector register file with arbitrary vector addressing

2003-11-15

2008-12-16

Pan, Daniel (Department: 2183)

Electrical computers and digital processing systems: processing

Processing architecture

Vector processor

C712S007000, C712S022000

Reexamination Certificate

active

07467288

ABSTRACT:
A system and method for processing operations that use data vectors each comprising a plurality of data elements, in accordance with the present invention, includes a vector data file comprising a plurality of storage elements for storing data elements of the data vectors. A pointer array is coupled by a bus to the vector data file. The pointer array includes a plurality of entries wherein each entry identifies at least one storage element in the vector data file. The at least one storage element stores at least one data element of the data vectors, wherein for at least one particular entry in the pointer array, the at least one storage element identified by the particular entry has an arbitrary starting address in the vector data file.

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International Search Report dated (Feb. 23, 2004).

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