Electrical computers and digital processing systems: processing – Processing architecture – Vector processor
Reexamination Certificate
2000-02-29
2003-12-16
Pan, Daniel H. (Department: 2783)
Electrical computers and digital processing systems: processing
Processing architecture
Vector processor
C712S007000, C712S022000
Reexamination Certificate
active
06665790
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to digital processing, for example processing employing but not limited to multimedia processors, single instruction multiple data (SIMD) processors, digital signal processors with SIMD (Vector) processing capability, or similar devices, and more particularly, to vector register files used in digital processing to temporarily store inputs and outputs of computations.
2. Description of the Related Art
Single instruction multiple data (SIMD) processing is a powerful architectural concept having wide acceptance for computations involving media data or digital signal processing algorithms. It permits a single instruction to specify the computation on one or more streams of data values arranged as one dimensional vectors. Data are specified for the computation as coming from memory or from a register file typically holding vectors in one dimensional sequential order. Elements of the vector are accessed for the computation either sequentially (i.e., element
1
,
2
,
3
. . . ) or by stride (i.e., a fixed increment). However, many algorithms require irregular access to vector elements, either because of table-lookup like algorithms or because the elements require some address permutation, such as bit reversal. Typically, accesses of this type are performed one element at a time to form a new vector in the file which is then accessed sequentially. The performance of an algorithm which must be implemented in this manner is much less than would be possible for true SIMD processing.
Therefore, a need exists for a vector register architecture which permits all these modes of operation in the same structure to optimize performance.
SUMMARY OF THE INVENTION
A system and method for processing operations that use data vectors each comprising a plurality of data elements, in accordance with the present invention, includes a vector data file comprising a plurality of storage elements for storing data elements of the data vectors. A pointer array is coupled by a bus to the vector data file. The pointer array includes a plurality of entries wherein each entry identifies at least one storage element in the vector data file. The at least one storage element stores at least one data element of the data vectors, wherein for at least one particular entry in the pointer array, the at least one storage element identified by the particular entry has an arbitrary starting address in the vector data file.
In alternate embodiments, for any given entry in the pointer array, the at least one storage element identified by the any given entry may include an arbitrary starting address in the vector data file. The pointer array may include at least one entry which is updated based on data read out from at least one data element in the vector data file. The pointer array may include at least one entry which is updated based on data generated by incrementing data read from at least one entry of the pointer array. The pointer array may include at least one entry which is updated based on data generated by performing an increment operation on data read from at least one entry of the pointer array. The pointer array may further include at least two entries which are updated as part of a same logical operation. The increment operation may include at least one of a modulo operation and a stride operation. Each entry of the pointer array may include a starting address of at least one storage element in the vector data file.
In still other embodiments, the storage elements of the vector data file may be logically organized in a matrix of rows and columns, and each entry of the pointer array may include an address representing the row and column of at least one element in the vector data file. The storage elements of the vector file data may be logically organized in a matrix of rows and columns, and each array of the pointer array may include an address representing the row and column of a single element in the vector data file. For any given entry in the pointer array, the at least one storage element identified by the any given entry may be independent with respect to the at least one storage element identified by other entries of the pointer array.
A method for processing operations that use data vectors each comprising a plurality of data elements, the method includes providing a vector data file comprising a plurality of storage elements for storing data elements of the data vectors, and providing a pointer array having a plurality of entries. Each entry identifies at least one storage element in the vector data file for storing at least one data element of the data vectors, and for at least one particular entry in the pointer array, the at least one storage element identified by the particular entry has an arbitrary starting address in the vector data file.
In other methods, for any given entry in the pointer array, the at least one storage element identified by the any given entry may have an arbitrary starting address in the vector data file. The method may further include the step of updating at least one of the entries of the pointer array based on data read out from at least one data element in the vector data file. The method may also include the step of updating at least one of the entries of the pointer array based on data read out from data generated by incrementing data read from at least one entry of the pointer array. The method may also include the step of updating at least one of the entries of the pointer array based on data generated by performing an increment operation on data read from at least one entry of the pointer array. At least two entries of the pointer array may be updated as part of a same logical operation.
In still other methods, the increment operation may further include at least one of a modulo operation and a stride operation on data read from at least one entry of the pointer array. Each entry of the pointer array may store a starting address of at least one storage element in the vector data file. The storage elements of the vector data file may be logically organized in a matrix of rows and columns, and each entry of the pointer array may store an address representing the row and column of at least one element in the vector data file. The storage elements of the vector file data may be logically organized in a matrix of rows and columns, and each array of the pointer array may store an address representing the row and column of a single element in the vector data file. For any given entry in the pointer array, the at least one storage element identified by the any given entry may be independent with respect to the at least one storage element identified by other entries of the pointer array. The above method steps may be implemented by a program storage device readable by machine, tangibly embodying a program of instructions executable by the machine to perform these method steps for processing operations that use data vectors each comprising a plurality of data elements.
These and other objects, features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings.
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patent: 5528550 (1996-06-01), Pawate et al.
patent: 5669013 (1997-09-01), Watanabe et al.
patent: 6016395 (2000-01-01), Mohamed
United Kingdom Patent Office Search Report, App #GB 0103558.3.
Glossner, III Clair John
Hokenek Erdem
Meltzer David
Moudgill Mayan
F. Chau & Associates LLP
International Business Machines - Corporation
Pan Daniel H.
Trepp Robert M.
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