Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
2006-05-19
2010-10-19
Treat, William M (Department: 2181)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
C712S222000
Reexamination Certificate
active
07818540
ABSTRACT:
A vector processing system for executing vector instructions, each instruction defining multiple value pairs, an operation to be executed and a modifier, the vector processing system comprising a plurality of parallel processing units, each arranged to receive one of said pairs of values and, when selected, to implement an operation on said value pair to generate a result, each processing unit comprising at least one flag and being selectable in dependence on a condition defined by said at least one flag, wherein the modifier defines the condition under which the parallel processing unit is individually selected.
REFERENCES:
patent: 5480822 (1996-01-01), Hsue et al.
patent: 5696947 (1997-12-01), Johns et al.
patent: 5887183 (1999-03-01), Agarwal et al.
patent: 5890222 (1999-03-01), Agarwal et al.
patent: 6151668 (2000-11-01), Pechanek et al.
patent: 6366999 (2002-04-01), Drabenstott et al.
patent: 7072929 (2006-07-01), Pechanek et al.
patent: WO 89/02130 (1989-03-01), None
European Search Report corresponding to European Patent Application Serial No. 02257541.9-2211, dated Feb. 25, 2009.
Bailey Neil
Barlow Stephen
Plowman David
Ramsdale Timothy
Swann Robert
Broadcom Corporation
McAndrews Held & Malloy Ltd.
Treat William M
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